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| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2019-02-25 10:48:39 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-06 20:06:48 +0000 |
| commit | 7a732b4781e7b83abda3230055d7110e1db730f3 (patch) | |
| tree | c68cc1349301ec0cb484b28bfdef78c718249bcb /src/include/device | |
| parent | 46e6852062dfe87281860659034bf20ca16d7aa6 (diff) | |
| download | coreboot-7a732b4781e7b83abda3230055d7110e1db730f3.tar.gz coreboot-7a732b4781e7b83abda3230055d7110e1db730f3.tar.bz2 coreboot-7a732b4781e7b83abda3230055d7110e1db730f3.zip | |
soc/intel/skylake: Add H110 PCH series
This patch adds support H110 chipset (Sunrise Point) for Skylake and
Kaby Lake processor families by adding the corresponding IDs. It has
been tested on ASRock H110M-DVS motherboard (Skylake i5-6600 CPU).
Change-Id: I85ba65ac860687b0f9fd781938e5cac21a1b668d
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31602
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/include/device')
| -rw-r--r-- | src/include/device/pci_ids.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 4f7f2986cb8f..dc55bf928c90 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2691,6 +2691,7 @@ #define PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM 0x9d46 #define PCI_DEVICE_ID_INTEL_SPT_H_C236 0xa150 #define PCI_DEVICE_ID_INTEL_SPT_H_PREMIUM 0xa14e +#define PCI_DEVICE_ID_INTEL_SPT_H_H110 0xa143 #define PCI_DEVICE_ID_INTEL_SPT_H_QM170 0xa14d #define PCI_DEVICE_ID_INTEL_SPT_H_HM175 0xa152 #define PCI_DEVICE_ID_INTEL_SPT_H_QM175 0xa153 |