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| author | Myles Watson <mylesgw@gmail.com> | 2009-10-26 15:14:07 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2009-10-26 15:14:07 +0000 |
| commit | d73c1b5bf1246855a4d4e847702214a3eeb6ab82 (patch) | |
| tree | bd0cbb31eeaad93213abef425135eeaea526a823 /src/mainboard/amd/serengeti_cheetah/Kconfig | |
| parent | 074356ec819be284fb1e8d18a68678b72c5282da (diff) | |
| download | coreboot-d73c1b5bf1246855a4d4e847702214a3eeb6ab82.tar.gz coreboot-d73c1b5bf1246855a4d4e847702214a3eeb6ab82.tar.bz2 coreboot-d73c1b5bf1246855a4d4e847702214a3eeb6ab82.zip | |
Define some variables that were not defined. There are a couple left.
Do kbuildall then grep not.defined kbuildall.results/*
The interesting ones were GENERATE_* I had to put them in twice to make it work
correctly: once outside the menu setting the defaults, and once inside the menu.
Now they show up when they should, and are always defined
Define HAVE_INIT_TIMER to only exclude the three boards that define it to be 0
in newconfig.
Define MEM_TRAIN_SEQ to be an integer and set it correctly.
Remove CAR_FAM10 and just depend on NORTHBRIDGE_AMD_AMDFAM10
MOVNTI is a performance enhancement, and should default to 0 so it doesn't break
boards that forget to define it.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/amd/serengeti_cheetah/Kconfig')
| -rw-r--r-- | src/mainboard/amd/serengeti_cheetah/Kconfig | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/mainboard/amd/serengeti_cheetah/Kconfig b/src/mainboard/amd/serengeti_cheetah/Kconfig index 3af08ec04608..7804def85e27 100644 --- a/src/mainboard/amd/serengeti_cheetah/Kconfig +++ b/src/mainboard/amd/serengeti_cheetah/Kconfig @@ -14,7 +14,6 @@ config BOARD_AMD_SERENGETI_CHEETAH select HAVE_HARD_RESET select IOAPIC select LIFT_BSP_APIC_ID - select MEM_TRAIN_SEQ select AP_CODE_IN_CAR select SB_HT_CHAIN_UNITID_OFFSET_ONLY select WAIT_BEFORE_CPUS_INIT @@ -81,6 +80,11 @@ config HW_MEM_HOLE_SIZE_AUTO_INC default n depends on BOARD_AMD_SERENGETI_CHEETAH +config MEM_TRAIN_SEQ + int + default 1 + depends on BOARD_AMD_SERENGETI_CHEETAH + config SB_HT_CHAIN_ON_BUS0 int default 2 |