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authorAngel Pons <th3fanbus@gmail.com>2021-06-23 14:39:32 +0200
committerAngel Pons <th3fanbus@gmail.com>2022-08-14 10:53:47 +0000
commit333751b22e046793d84d72d1053b9c6aa2854d77 (patch)
tree5750680fb5ba2834b7cff29ae813f145972b7b9b /src/mainboard/google/auron
parenteb80d8da8862aa49b0b6b67e0166fa831f8f1343 (diff)
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broadwell: Compute channel disable masks at runtime
Introduce the `SPD_MEMORY_DOWN` macro to indicate that a slot is used with memory-down. This enables computing the channel disable masks as the bits for slots where the SPD address is zero. To preserve current behavior, zero the SPD addresses for memory-down slots afterwards. Change-Id: I75b7be7c72062d1a26cfc7b09b79de62de0a9cea Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55807 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google/auron')
-rw-r--r--src/mainboard/google/auron/spd.c7
-rw-r--r--src/mainboard/google/auron/variants/auron_paine/pei_data.c4
-rw-r--r--src/mainboard/google/auron/variants/auron_yuna/pei_data.c4
-rw-r--r--src/mainboard/google/auron/variants/buddy/spd/spd.c2
-rw-r--r--src/mainboard/google/auron/variants/gandof/pei_data.c4
-rw-r--r--src/mainboard/google/auron/variants/lulu/pei_data.c4
-rw-r--r--src/mainboard/google/auron/variants/samus/pei_data.c4
7 files changed, 4 insertions, 25 deletions
diff --git a/src/mainboard/google/auron/spd.c b/src/mainboard/google/auron/spd.c
index 49ee42c5e17b..686a24225e4e 100644
--- a/src/mainboard/google/auron/spd.c
+++ b/src/mainboard/google/auron/spd.c
@@ -104,9 +104,10 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
const unsigned int spd_index = variant_get_spd_index();
fill_spd_for_index(pei_data->spd_data[0][0], spd_index);
+ pei_data->spd_addresses[0] = SPD_MEMORY_DOWN;
- if (variant_is_dual_channel(spd_index))
+ if (variant_is_dual_channel(spd_index)) {
memcpy(pei_data->spd_data[1][0], pei_data->spd_data[0][0], SPD_LEN);
- else
- pei_data->dimm_channel1_disabled = 3;
+ pei_data->spd_addresses[2] = SPD_MEMORY_DOWN;
+ }
}
diff --git a/src/mainboard/google/auron/variants/auron_paine/pei_data.c b/src/mainboard/google/auron/variants/auron_paine/pei_data.c
index 9a6fe7bcaeac..b157fcdf8054 100644
--- a/src/mainboard/google/auron/variants/auron_paine/pei_data.c
+++ b/src/mainboard/google/auron/variants/auron_paine/pei_data.c
@@ -7,10 +7,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
pei_data->ec_present = 1;
- /* One installed DIMM per channel -- can be changed by SPD init */
- pei_data->dimm_channel0_disabled = 2;
- pei_data->dimm_channel1_disabled = 2;
-
/* P0: LTE */
pei_data_usb2_port(pei_data, 0, 0x0150, 1, USB_OC_PIN_SKIP, USB_PORT_MINI_PCIE);
/* P1: POrt A, CN10 */
diff --git a/src/mainboard/google/auron/variants/auron_yuna/pei_data.c b/src/mainboard/google/auron/variants/auron_yuna/pei_data.c
index 9a6fe7bcaeac..b157fcdf8054 100644
--- a/src/mainboard/google/auron/variants/auron_yuna/pei_data.c
+++ b/src/mainboard/google/auron/variants/auron_yuna/pei_data.c
@@ -7,10 +7,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
pei_data->ec_present = 1;
- /* One installed DIMM per channel -- can be changed by SPD init */
- pei_data->dimm_channel0_disabled = 2;
- pei_data->dimm_channel1_disabled = 2;
-
/* P0: LTE */
pei_data_usb2_port(pei_data, 0, 0x0150, 1, USB_OC_PIN_SKIP, USB_PORT_MINI_PCIE);
/* P1: POrt A, CN10 */
diff --git a/src/mainboard/google/auron/variants/buddy/spd/spd.c b/src/mainboard/google/auron/variants/buddy/spd/spd.c
index 6fb439b96c83..571aaafd3370 100644
--- a/src/mainboard/google/auron/variants/buddy/spd/spd.c
+++ b/src/mainboard/google/auron/variants/buddy/spd/spd.c
@@ -9,8 +9,6 @@ void mainboard_fill_spd_data(struct pei_data *pei_data)
{
pei_data->spd_addresses[0] = 0xa0;
pei_data->spd_addresses[2] = 0xa4;
- pei_data->dimm_channel0_disabled = 2;
- pei_data->dimm_channel1_disabled = 2;
/* Enable 2x refresh mode */
pei_data->ddr_refresh_2x = 1;
pei_data->dq_pins_interleaved = 1;
diff --git a/src/mainboard/google/auron/variants/gandof/pei_data.c b/src/mainboard/google/auron/variants/gandof/pei_data.c
index 9a6fe7bcaeac..b157fcdf8054 100644
--- a/src/mainboard/google/auron/variants/gandof/pei_data.c
+++ b/src/mainboard/google/auron/variants/gandof/pei_data.c
@@ -7,10 +7,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
pei_data->ec_present = 1;
- /* One installed DIMM per channel -- can be changed by SPD init */
- pei_data->dimm_channel0_disabled = 2;
- pei_data->dimm_channel1_disabled = 2;
-
/* P0: LTE */
pei_data_usb2_port(pei_data, 0, 0x0150, 1, USB_OC_PIN_SKIP, USB_PORT_MINI_PCIE);
/* P1: POrt A, CN10 */
diff --git a/src/mainboard/google/auron/variants/lulu/pei_data.c b/src/mainboard/google/auron/variants/lulu/pei_data.c
index 812bd3ba17f4..663dd359e988 100644
--- a/src/mainboard/google/auron/variants/lulu/pei_data.c
+++ b/src/mainboard/google/auron/variants/lulu/pei_data.c
@@ -7,10 +7,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
{
pei_data->ec_present = 1;
- /* One installed DIMM per channel -- can be changed by SPD init */
- pei_data->dimm_channel0_disabled = 2;
- pei_data->dimm_channel1_disabled = 2;
-
/* P0: Port B, CN01 (IOBoard) */
pei_data_usb2_port(pei_data, 0, 0x0150, 1, 0, USB_PORT_BACK_PANEL);
/* P1: Port A, CN01 */
diff --git a/src/mainboard/google/auron/variants/samus/pei_data.c b/src/mainboard/google/auron/variants/samus/pei_data.c
index 549e8d9a532f..4ef45ee10ce2 100644
--- a/src/mainboard/google/auron/variants/samus/pei_data.c
+++ b/src/mainboard/google/auron/variants/samus/pei_data.c
@@ -20,10 +20,6 @@ void mainboard_fill_pei_data(struct pei_data *pei_data)
pei_data->ec_present = 1;
- /* One installed DIMM per channel */
- pei_data->dimm_channel0_disabled = 2;
- pei_data->dimm_channel1_disabled = 2;
-
memcpy(pei_data->dq_map, dq_map, sizeof(dq_map));
memcpy(pei_data->dqs_map, dqs_map, sizeof(dqs_map));