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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-02-18 06:26:52 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-30 06:48:56 +0000 |
commit | bc441c72ce7739a5a4ef647e3331afe5fbddc86e (patch) | |
tree | 079a4ede1734eda931d6857ccea5d285b5fb60a6 /src/mainboard/google/butterfly | |
parent | 8a1fcf475401f32208c48376205a443a3acbf5c1 (diff) | |
download | coreboot-bc441c72ce7739a5a4ef647e3331afe5fbddc86e.tar.gz coreboot-bc441c72ce7739a5a4ef647e3331afe5fbddc86e.tar.bz2 coreboot-bc441c72ce7739a5a4ef647e3331afe5fbddc86e.zip |
mb/google: Move ECFW_RW setting for non-ChromeEC boards
The boolean is stored in ChromeOS NVS, not GNVS.
Change-Id: I5c424a052d484228a456f8f0ad4fb0bed3165e09
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50877
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/google/butterfly')
-rw-r--r-- | src/mainboard/google/butterfly/acpi_tables.c | 7 | ||||
-rw-r--r-- | src/mainboard/google/butterfly/chromeos.c | 7 |
2 files changed, 7 insertions, 7 deletions
diff --git a/src/mainboard/google/butterfly/acpi_tables.c b/src/mainboard/google/butterfly/acpi_tables.c index c3324aac5ef0..aa02f67be545 100644 --- a/src/mainboard/google/butterfly/acpi_tables.c +++ b/src/mainboard/google/butterfly/acpi_tables.c @@ -14,13 +14,6 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs) gnvs->s5u0 = 0; gnvs->s5u1 = 0; - // TODO: MLR - // The firmware read/write status is a "virtual" switch and - // will be handled elsewhere. Until then hard-code to - // read/write instead of read-only for developer mode. - if (CONFIG(CHROMEOS_NVS)) - gnvs_set_ecfw_rw(); - // the lid is open by default. gnvs->lids = 1; diff --git a/src/mainboard/google/butterfly/chromeos.c b/src/mainboard/google/butterfly/chromeos.c index c4eb66ab6420..356e97b7b5e4 100644 --- a/src/mainboard/google/butterfly/chromeos.c +++ b/src/mainboard/google/butterfly/chromeos.c @@ -68,5 +68,12 @@ static const struct cros_gpio cros_gpios[] = { void mainboard_chromeos_acpi_generate(void) { + // TODO: MLR + // The firmware read/write status is a "virtual" switch and + // will be handled elsewhere. Until then hard-code to + // read/write instead of read-only for developer mode. + if (CONFIG(CHROMEOS_NVS)) + chromeos_set_ecfw_rw(); + chromeos_acpi_gpio_generate(cros_gpios, ARRAY_SIZE(cros_gpios)); } |