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| author | Iru Cai <mytbk920423@gmail.com> | 2017-07-07 13:32:40 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-08-18 15:31:21 +0000 |
| commit | 728d488ab39c44721300588f81626263e538cae5 (patch) | |
| tree | ba3ad4dc88670b7edcef09e015871352a766a9ce /src/mainboard/hp/8460p/dsdt.asl | |
| parent | 6f08ef9bdaec2a81cd6d70192aa37bda2ace6640 (diff) | |
| download | coreboot-728d488ab39c44721300588f81626263e538cae5.tar.gz coreboot-728d488ab39c44721300588f81626263e538cae5.tar.bz2 coreboot-728d488ab39c44721300588f81626263e538cae5.zip | |
mainboard/hp: Add HP Elitebook 8460p
The code is based on autoport. I'm using a machine with discrete GPU,
and gfx.* in devicetree.cb is from 2760p.
It can be debug with serial port on dock.
Tested:
- CPU and memory: i5-2540M, 4G+0
- Arch Linux (Linux 4.11.7, SeaBIOS payload, with ATOM BIOS extracted
from vendor UEFI firmware)
- USB ports
- SD card reader
- WLAN
- DP display
- S3
Change-Id: I9c42723ba240a2e9b46998c1a8a708aebc66c604
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/20501
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/hp/8460p/dsdt.asl')
| -rw-r--r-- | src/mainboard/hp/8460p/dsdt.asl | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/src/mainboard/hp/8460p/dsdt.asl b/src/mainboard/hp/8460p/dsdt.asl new file mode 100644 index 000000000000..d4fab7a9e5b1 --- /dev/null +++ b/src/mainboard/hp/8460p/dsdt.asl @@ -0,0 +1,45 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB +#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB +#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0 +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x03, // DSDT revision: ACPI v3.0 + "COREv4", // OEM id + "COREBOOT", // OEM table id + 0x20141018 // OEM revision +) +{ + // Some generic macros + #include "acpi/platform.asl" + #include <cpu/intel/model_206ax/acpi/cpu.asl> + #include <southbridge/intel/bd82x6x/acpi/platform.asl> + /* global NVS and variables. */ + #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl> + #include <southbridge/intel/bd82x6x/acpi/sleepstates.asl> + + Scope (\_SB) { + Device (PCI0) + { + #include <northbridge/intel/sandybridge/acpi/sandybridge.asl> + #include <drivers/intel/gma/acpi/default_brightness_levels.asl> + #include <southbridge/intel/bd82x6x/acpi/pch.asl> + #include <southbridge/intel/bd82x6x/acpi/default_irq_route.asl> + } + } +} |