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author | Felix Singer <felixsinger@posteo.net> | 2021-01-07 02:02:16 +0000 |
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committer | Nico Huber <nico.h@gmx.de> | 2021-01-09 15:20:38 +0000 |
commit | 32d893bfbb41792f29127e5f651da300c9b0079f (patch) | |
tree | a3df9e1cad6c60ef89e67a7ff83d31e82d80ff5b /src/mainboard/hp | |
parent | a4ee796115fa07712215bdd99ae68c824cfca089 (diff) | |
download | coreboot-32d893bfbb41792f29127e5f651da300c9b0079f.tar.gz coreboot-32d893bfbb41792f29127e5f651da300c9b0079f.tar.bz2 coreboot-32d893bfbb41792f29127e5f651da300c9b0079f.zip |
mb/hp/pavilion_m6_1035dx: Replace leading spaces with tabs
Replace leading spaces with tabs so that linter doesn't complain. Also,
remove an unneeded empty line.
Change-Id: I5809c1ca13782393cb4c4051a7061186c1c144e4
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49195
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/hp')
-rw-r--r-- | src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c b/src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c index 95f2c93004d9..b6cdc867aef5 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/OemCustomize.c @@ -183,15 +183,14 @@ void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly) * data from the table. Otherwise, it will use its default conservative settings */ static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[] = { - - NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, 1), - NUMBER_OF_CHANNELS_SUPPORTED(ANY_SOCKET, 2), - MEMCLK_DIS_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), - CKE_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x05, 0x0A), - ODT_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00), - CS_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), - - PSO_END + NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, 1), + NUMBER_OF_CHANNELS_SUPPORTED(ANY_SOCKET, 2), + MEMCLK_DIS_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), + CKE_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x05, 0x0A), + ODT_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00), + CS_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00), + + PSO_END }; void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost) |