diff options
| author | Martin Roth <gaumless@gmail.com> | 2015-06-19 23:39:38 -0600 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2015-06-27 02:47:39 +0200 |
| commit | 0458370bf7f579966d42c6eb7fa067715b44b393 (patch) | |
| tree | 1e0affcf4842a2aef9fa50fb43caa814e2873867 /src/mainboard/intel/bakersport_fsp | |
| parent | 302a2ec7d1751bf1b40e13df36c9ee1d31497f85 (diff) | |
| download | coreboot-0458370bf7f579966d42c6eb7fa067715b44b393.tar.gz coreboot-0458370bf7f579966d42c6eb7fa067715b44b393.tar.bz2 coreboot-0458370bf7f579966d42c6eb7fa067715b44b393.zip | |
Kconfig: Remove unnecessary and incorrect MRC_CACHE symbols
Because of a misunderstanding of how Kconfig files are parsed, the
OVERRIDE_MRC_CACHE_LOC symbol was added to make sure that the value
was correctly set. This is not needed unless for some reason the
Kconfig parser is suddenly rewritten to parse everything differently.
At some point, the value in the FSP's Kconfig file was updated to
OVERRIDE_CACHE_CACHE_LOC, while the entries in the mainboard
Kconfig files were not updated. This resulted in the default values
not getting set correctly by default on the FSP Bay Trail boards.
This removes the whole bunch of incorrect and unnecessary symbols and
just sets the default for the MRC cache location directly.
Change-Id: I1cec758576866b7e0677272b8309bfde8d4a1ee4
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/10611
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/intel/bakersport_fsp')
| -rw-r--r-- | src/mainboard/intel/bakersport_fsp/Kconfig | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/intel/bakersport_fsp/Kconfig b/src/mainboard/intel/bakersport_fsp/Kconfig index edd8803cb51b..7f5513a637d5 100644 --- a/src/mainboard/intel/bakersport_fsp/Kconfig +++ b/src/mainboard/intel/bakersport_fsp/Kconfig @@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_2048 select HAVE_ACPI_TABLES select HAVE_OPTION_TABLE - select OVERRIDE_MRC_CACHE_LOC select POST_IO select ENABLE_BUILTIN_COM1 if FSP_PACKAGE_DEFAULT select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT @@ -59,7 +58,7 @@ config FSP_FILE string default "../intel/fsp/baytrail/BAYTRAIL_FSP_ECC.fd" if BOARD_INTEL_BAKERSPORT_FSP -config MRC_CACHE_LOC_OVERRIDE +config MRC_CACHE_LOC hex default 0xfff80000 depends on ENABLE_FSP_FAST_BOOT |