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| author | Felix Singer <felixsinger@posteo.net> | 2021-05-03 02:33:15 +0200 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-08-12 21:42:36 +0000 |
| commit | f9d7dc7ed3de9383740295871c8adde66c688425 (patch) | |
| tree | 543cfe5f5135c4c62901feab6c0b215376b03176 /src/mainboard/intel | |
| parent | c8fc542e1b7828e86e2d4a5b6b743ce7a7d50665 (diff) | |
| download | coreboot-f9d7dc7ed3de9383740295871c8adde66c688425.tar.gz coreboot-f9d7dc7ed3de9383740295871c8adde66c688425.tar.bz2 coreboot-f9d7dc7ed3de9383740295871c8adde66c688425.zip | |
soc/intel/alderlake: Clean up FSP chipset lockdown configuration
Use a variable to store if the FSP should be responsible for the chipset
lockdown and use it for setting related configuration options. Thus, get
rid of that if-else-clause.
Change-Id: Ia6485bde5b33af067dfb15ca410a164e288b76b2
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52846
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/mainboard/intel')
0 files changed, 0 insertions, 0 deletions