summaryrefslogtreecommitdiffstats
path: root/src/mainboard/intel
diff options
context:
space:
mode:
authorPatrick Georgi <patrick.georgi@coresystems.de>2010-05-08 09:14:51 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-05-08 09:14:51 +0000
commit12584e2bd2ec7ab1ed60dc524574c8ae04dc17d6 (patch)
tree3ce28ab0588aff88ca74bb3281be61bbbd703c4c /src/mainboard/intel
parent66e5bbe45fac014fb6e49c03fab453f0e866dad6 (diff)
downloadcoreboot-12584e2bd2ec7ab1ed60dc524574c8ae04dc17d6.tar.gz
coreboot-12584e2bd2ec7ab1ed60dc524574c8ae04dc17d6.tar.bz2
coreboot-12584e2bd2ec7ab1ed60dc524574c8ae04dc17d6.zip
Drop console/console.c and pc80/serial.c from mainboards'
romstage.c. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5528 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel')
-rw-r--r--src/mainboard/intel/d945gclf/romstage.c2
-rw-r--r--src/mainboard/intel/eagleheights/romstage.c3
-rw-r--r--src/mainboard/intel/jarrell/romstage.c2
-rw-r--r--src/mainboard/intel/mtarvon/romstage.c2
-rw-r--r--src/mainboard/intel/truxton/romstage.c2
-rw-r--r--src/mainboard/intel/xe7501devkit/romstage.c2
6 files changed, 5 insertions, 8 deletions
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 45e9fb1341a1..c50a66f77639 100644
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -37,8 +37,6 @@
#include "pc80/mc146818rtc_early.c"
#include <console/console.h>
-#include "pc80/serial.c"
-#include "console/console.c"
#include <cpu/x86/bist.h>
#if CONFIG_USBDEBUG_DIRECT
diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c
index 39490fa68293..cc6966b074f1 100644
--- a/src/mainboard/intel/eagleheights/romstage.c
+++ b/src/mainboard/intel/eagleheights/romstage.c
@@ -32,8 +32,7 @@
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
-#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include <cpu/x86/bist.h>
#include "lib/ramtest.c"
diff --git a/src/mainboard/intel/jarrell/romstage.c b/src/mainboard/intel/jarrell/romstage.c
index 823519984e0d..3a91127484ee 100644
--- a/src/mainboard/intel/jarrell/romstage.c
+++ b/src/mainboard/intel/jarrell/romstage.c
@@ -8,7 +8,7 @@
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801ex/i82801ex_early_smbus.c"
#include "northbridge/intel/e7520/raminit.h"
diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c
index 86ac6b7bad0f..8ac4399d3fa7 100644
--- a/src/mainboard/intel/mtarvon/romstage.c
+++ b/src/mainboard/intel/mtarvon/romstage.c
@@ -28,7 +28,7 @@
#include <cpu/x86/lapic.h>
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i3100/i3100_early_smbus.c"
#include "southbridge/intel/i3100/i3100_early_lpc.c"
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index 9d44f259ead8..781f9b89b313 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -29,7 +29,7 @@
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
#include "pc80/udelay_io.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i3100/i3100_early_smbus.c"
#include "southbridge/intel/i3100/i3100_early_lpc.c"
diff --git a/src/mainboard/intel/xe7501devkit/romstage.c b/src/mainboard/intel/xe7501devkit/romstage.c
index 99f00212c1d0..87c0a04d28d9 100644
--- a/src/mainboard/intel/xe7501devkit/romstage.c
+++ b/src/mainboard/intel/xe7501devkit/romstage.c
@@ -9,7 +9,7 @@
#include "option_table.h"
#include "pc80/mc146818rtc_early.c"
#include "pc80/serial.c"
-#include "console/console.c"
+#include <console/console.h>
#include "lib/ramtest.c"
#include "southbridge/intel/i82801cx/i82801cx_early_smbus.c"
#include "northbridge/intel/e7501/raminit.h"