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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-25 14:37:18 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-25 14:37:18 +0000 |
| commit | 467a065384f0d50cbf2d100b55b58168ec98f0d3 (patch) | |
| tree | ca04ca9ad8d9ad716bbd3f787dad0b8d50a36b22 /src/mainboard/intel | |
| parent | d55e26f1b1efe50aa013ad32bdf3e2b58101a64f (diff) | |
| download | coreboot-467a065384f0d50cbf2d100b55b58168ec98f0d3.tar.gz coreboot-467a065384f0d50cbf2d100b55b58168ec98f0d3.tar.bz2 coreboot-467a065384f0d50cbf2d100b55b58168ec98f0d3.zip | |
no warnings days.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5493 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel')
| -rw-r--r-- | src/mainboard/intel/jarrell/jarrell_fixups.c | 12 | ||||
| -rw-r--r-- | src/mainboard/intel/jarrell/reset.c | 9 | ||||
| -rw-r--r-- | src/mainboard/intel/xe7501devkit/reset.c | 2 |
3 files changed, 11 insertions, 12 deletions
diff --git a/src/mainboard/intel/jarrell/jarrell_fixups.c b/src/mainboard/intel/jarrell/jarrell_fixups.c index fb00984b7ede..7fb5a20dbb69 100644 --- a/src/mainboard/intel/jarrell/jarrell_fixups.c +++ b/src/mainboard/intel/jarrell/jarrell_fixups.c @@ -4,7 +4,7 @@ static void mch_reset(void) { device_t dev; unsigned long value, base; - dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0); + dev = pci_locate_device_on_bus(PCI_ID(0x8086, 0x24d0), 0); if (dev != PCI_DEV_INVALID) { /* I/O space is always enables */ @@ -30,8 +30,6 @@ static void mch_reset(void) return; } - - static void mainboard_set_e7520_pll(unsigned bits) { uint16_t gpio_index; @@ -64,14 +62,13 @@ static void mainboard_set_e7520_pll(unsigned bits) outb((data & 0xeb) | ((bits&2)?0:1)<<4 | ((bits&1)?0:1)<<2, gpio_index + PC87427_GPDO_4); /* reset */ print_debug("set_pllsel: settings adjusted, now resetting...\n"); - // hard_reset(); /* should activate a PCI_RST, which should reset MCH, but it doesn't seem to work ???? */ -// mch_reset(); + // hard_reset(); /* should activate a PCI_RST, which should reset MCH, but it doesn't seem to work ???? */ + // mch_reset(); full_reset(); } return; } - static void mainboard_set_e7520_leds(void) { uint8_t cnt; @@ -118,6 +115,3 @@ static void mainboard_set_e7520_leds(void) return; } - - - diff --git a/src/mainboard/intel/jarrell/reset.c b/src/mainboard/intel/jarrell/reset.c index fb379bd37293..2ecfa48b8f6d 100644 --- a/src/mainboard/intel/jarrell/reset.c +++ b/src/mainboard/intel/jarrell/reset.c @@ -1,6 +1,6 @@ #include <arch/io.h> -#include <reset.h> #include <arch/romcc_io.h> +#include <reset.h> void soft_reset(void) { @@ -13,6 +13,11 @@ void hard_reset(void) outb(0x06, 0xcf9); } +#ifndef __ROMCC__ +/* Used only board-internally by power_reset_check.c and jarell_fixups.c */ +void full_reset(void); +#endif + void full_reset(void) { /* Enable power on after power fail... */ @@ -20,7 +25,7 @@ void full_reset(void) byte = pci_read_config8(PCI_DEV(0, 0x1f, 0), 0xa4); byte &= 0xfe; pci_write_config8(PCI_DEV(0, 0x1f, 0), 0xa4, byte); + outb(0x0e, 0xcf9); } - diff --git a/src/mainboard/intel/xe7501devkit/reset.c b/src/mainboard/intel/xe7501devkit/reset.c index 7abc9e5318b9..106920acbe72 100644 --- a/src/mainboard/intel/xe7501devkit/reset.c +++ b/src/mainboard/intel/xe7501devkit/reset.c @@ -1,6 +1,6 @@ #include <reset.h> -void i82801cx_hard_reset(void); +#include "southbridge/intel/i82801cx/i82801cx.h" void hard_reset(void) { |