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| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2019-07-17 09:40:33 +0200 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2019-07-18 11:46:41 +0000 |
| commit | 7815c074b4689d858fde7c8e02153c40de79645e (patch) | |
| tree | 3201bee12f3e762a9c19a9a71512e9c41afd8b90 /src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c | |
| parent | 23af8bac7242955698115c57323879f48b58604d (diff) | |
| download | coreboot-7815c074b4689d858fde7c8e02153c40de79645e.tar.gz coreboot-7815c074b4689d858fde7c8e02153c40de79645e.tar.bz2 coreboot-7815c074b4689d858fde7c8e02153c40de79645e.zip | |
mb/siemens/mc_apl1: Disable all UHS-I SD-Card speed modes
The limitation for SD-Card was originally only made for mc_apl2
mainboard. Since other mc_apl mainboards also use the SD-Card interface,
the speed mode setting is made in the parent mainboard_final.
In additional, all UHS-I bus speed modes are disabled because of a
limitation for industry use cases. This means that only HS mode is
permitted.
Change-Id: I2f1b51f13a53c2507c52d6a169d6384b8570b3bc
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34377
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/siemens/mc_apl1/variants/mc_apl5/gpio.c')
0 files changed, 0 insertions, 0 deletions