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authorKeith Hui <buurin@gmail.com>2023-07-22 12:49:05 -0400
committerFelix Held <felix-coreboot@felixheld.de>2023-11-13 20:31:23 +0000
commit45e4ab4a660cb7ce312f2d11a153f2d9ef4158da (patch)
tree8b0fb3b07ecb3cfa84aa77b51c0e1053a1415c73 /src/mainboard/supermicro/x9sae
parent940fe080bf1ed2dac827b569c70fb0ea11496041 (diff)
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mb/*: Update SPD mapping for sandybridge boards
Boards without HAVE_SPD_IN_CBFS: Move SPD mapping into devicetree. Boards with HAVE_SPD_IN_CBFS: Convert to Haswell-style SPD mapping. Change-Id: Id6ac0a36b2fc0b9686f6e875dd020ae8dba72a72 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76967 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/mainboard/supermicro/x9sae')
-rw-r--r--src/mainboard/supermicro/x9sae/devicetree.cb1
-rw-r--r--src/mainboard/supermicro/x9sae/early_init.c9
2 files changed, 1 insertions, 9 deletions
diff --git a/src/mainboard/supermicro/x9sae/devicetree.cb b/src/mainboard/supermicro/x9sae/devicetree.cb
index 12cbbaff3b70..f5183819d179 100644
--- a/src/mainboard/supermicro/x9sae/devicetree.cb
+++ b/src/mainboard/supermicro/x9sae/devicetree.cb
@@ -6,6 +6,7 @@ chip northbridge/intel/sandybridge
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"
register "gpu_panel_power_cycle_delay" = "4"
+ register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
device domain 0 on
subsystemid 0x15d9 0x0644 inherit
diff --git a/src/mainboard/supermicro/x9sae/early_init.c b/src/mainboard/supermicro/x9sae/early_init.c
index 7e032120bc29..5966b6607d89 100644
--- a/src/mainboard/supermicro/x9sae/early_init.c
+++ b/src/mainboard/supermicro/x9sae/early_init.c
@@ -2,7 +2,6 @@
#include <bootblock_common.h>
#include <device/pnp_ops.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include <superio/nuvoton/common/nuvoton.h>
#include <superio/nuvoton/nct6776/nct6776.h>
@@ -52,11 +51,3 @@ void bootblock_mainboard_early_init(void)
/* Enable UART */
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}
-
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
- read_spd(&spd[0], 0x50, id_only);
- read_spd(&spd[1], 0x51, id_only);
- read_spd(&spd[2], 0x52, id_only);
- read_spd(&spd[3], 0x53, id_only);
-}