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| author | Gabe Black <gabeblack@chromium.org> | 2013-07-01 05:12:40 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2013-07-15 18:34:12 +0200 |
| commit | 81cbadadc13a73220e8a02d47c2d0a182fa5b22f (patch) | |
| tree | 7be3b64a65cc4b0857b249c21a8cc90e2cd094e3 /src/mainboard/ti | |
| parent | 978c21512751c50ad92d459cbca39d98d9fc39a9 (diff) | |
| download | coreboot-81cbadadc13a73220e8a02d47c2d0a182fa5b22f.tar.gz coreboot-81cbadadc13a73220e8a02d47c2d0a182fa5b22f.tar.bz2 coreboot-81cbadadc13a73220e8a02d47c2d0a182fa5b22f.zip | |
beaglebone: Put some code in romstage.c so we can tell if it ran.
The placeholder code in beaglebone's romstage.c didn't do anything, it just
immediately tried to load the RAM stage and jump into it. That doesn't
currently work, and there's no indication whether you actually successfully
got into the ROM stage or not.
This change adds a few lines which initialize the console and say "Hi" so that
we can tell that the ROM stage is running.
Change-Id: I45a0908c3ac65b21e0e5020428696d2e54933d0e
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Reviewed-on: http://review.coreboot.org/3581
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard/ti')
| -rw-r--r-- | src/mainboard/ti/beaglebone/romstage.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/ti/beaglebone/romstage.c b/src/mainboard/ti/beaglebone/romstage.c index 3b9cae880ac3..e66a3dd29ef4 100644 --- a/src/mainboard/ti/beaglebone/romstage.c +++ b/src/mainboard/ti/beaglebone/romstage.c @@ -29,6 +29,9 @@ void main(void) { void *entry; + console_init(); + printk(BIOS_INFO, "Hello from romstage.\n"); + entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram"); printk(BIOS_INFO, "entry is 0x%p, leaving romstage.\n", entry); |