- copy_and_run() gets the same calling convention on AMD and on all the others.

- some vx800 Kconfig fixes
- remove warnings...
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5372 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

4 files changed, 6 insertions, 28 deletions

diff --git a/src/mainboard/via/epia-m700/fadt.c b/src/mainboard/via/epia-m700/fadt.c
index 5a3e3d6997d4..5802a8ed550b 100644
--- a/src/mainboard/via/epia-m700/fadt.c
+++ b/src/mainboard/via/epia-m700/fadt.c
@@ -36,8 +36,8 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
 	memcpy(header->asl_compiler_id, "LXB", 8);
 	header->asl_compiler_revision = 0;
 
-	fadt->firmware_ctrl = facs;
-	fadt->dsdt = dsdt;
+	fadt->firmware_ctrl = (u32)facs;
+	fadt->dsdt = (u32)dsdt;
 	fadt->preferred_pm_profile = 0;
 	fadt->sci_int = 0x9;
 
@@ -105,9 +105,9 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
 	fadt->reset_reg.addrh = 0x0;
 
 	fadt->reset_value = 0;
-	fadt->x_firmware_ctl_l = facs;
+	fadt->x_firmware_ctl_l = (u32)facs;
 	fadt->x_firmware_ctl_h = 0;
-	fadt->x_dsdt_l = dsdt;
+	fadt->x_dsdt_l = (u32)dsdt;
 	fadt->x_dsdt_h = 0;
 
 	fadt->x_pm1a_evt_blk.space_id = 1;
diff --git a/src/mainboard/via/epia-m700/romstage.c b/src/mainboard/via/epia-m700/romstage.c
index 91ddfee82e29..5a81f285177e 100644
--- a/src/mainboard/via/epia-m700/romstage.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -41,7 +41,6 @@
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
 #include <string.h>
-#include "cpu/x86/lapic/boot_cpu.c"
 
 /* This file contains the board-special SI value for raminit.c. */
 #include "driving_clk_phase_data.c"
@@ -59,18 +58,6 @@
  * This acpi_is_wakeup_early_via_VX800 is from Rudolf's patch on the list:
  * http://www.coreboot.org/pipermail/coreboot/2008-January/028787.html.
  */
-void jason_tsc_count_car(void)
-{
-#if 0
-	unsigned long long start;
-	asm volatile ("rdtsc" : "=A" (start));
-	start >>= 20;
-	print_emerg("jason_tsc_count_car=  ");
-	print_emerg_hex32((unsigned long) start);
-	print_emerg("\n");
-#endif
-}
-
 int acpi_is_wakeup_early_via_vx800(void)
 {
 	device_t dev;
@@ -431,8 +418,6 @@ void stage1_main(unsigned long bist)
 	 * g) Rx73h = 32h
 	*/
 
-	jason_tsc_count_car();
-
 	pci_write_config16(PCI_DEV(0, 0xf, 0), 0xBA,
 			   PCI_DEVICE_ID_VIA_VX855_IDE);
 	pci_write_config16(PCI_DEV(0, 0xf, 0), 0xBE,
@@ -462,7 +447,6 @@ void stage1_main(unsigned long bist)
 	 * written, then this must be a CPU restart (result of OS reboot cmd),
 	 * so we need a real "cold boot".
 	 */
-	jason_tsc_count_car();
 	if ((boot_mode != 3)
 	    && (pci_read_config8(PCI_DEV(0, 0, 3), 0x80) != 0)) {
 		outb(6, 0xcf9);
@@ -471,7 +455,6 @@ void stage1_main(unsigned long bist)
 	/* x86 cold boot I/O cmd. */
 	/* These 2 lines are the same with epia-cn port. */
 	enable_smbus();
-	jason_tsc_count_car();
 
 	/* This fix does help vx800!, but vx855 doesn't need this. */
 	/* smbus_fixup(&ctrl); */
@@ -564,8 +547,6 @@ void stage1_main(unsigned long bist)
 	/* This line is the same with cx700 port. */
 	enable_shadow_ram();
 
-	jason_tsc_count_car();
-
 	/*
 	 * For coreboot most time of S3 resume is the same as normal boot,
 	 * so some memory area under 1M become dirty, so before this happen,
@@ -801,7 +782,6 @@ cpu_reset_x:
 		print_debug("\n");
 #endif
 
-		jason_tsc_count_car();
 		/* Copy and execute coreboot_ram. */
 		copy_and_run(new_cpu_reset);
 		/* We will not return. */
diff --git a/src/mainboard/via/epia-m700/wakeup.c b/src/mainboard/via/epia-m700/wakeup.c
index a586f0dfdef8..16277b5faaba 100644
--- a/src/mainboard/via/epia-m700/wakeup.c
+++ b/src/mainboard/via/epia-m700/wakeup.c
@@ -111,9 +111,7 @@ static unsigned char show32[6] = {
 
 void acpi_jump_wake(u32 vector)
 {
-	u32 tmp, dwEip;
-	u16 tmpvector;
-	u8 Data;
+	u32 dwEip;
 	struct Xgt_desc_struct *wake_thunk16_Xgt_desc;
 
 	printk(BIOS_DEBUG, "IN ACPI JUMP WAKE TO %x\n", vector);
diff --git a/src/mainboard/via/epia/romstage.c b/src/mainboard/via/epia/romstage.c
index d8bd7608cfd5..202b117a42b9 100644
--- a/src/mainboard/via/epia/romstage.c
+++ b/src/mainboard/via/epia/romstage.c
@@ -75,7 +75,7 @@ static void enable_shadow_ram(void)
 	pci_write_config8(dev, 0x63, shadowreg);
 }
 
-void main(unsigned long bist)
+static void main(unsigned long bist)
 {
 	if (bist == 0) {
 		early_mtrr_init();