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author | Felix Singer <felixsinger@posteo.net> | 2024-01-13 23:01:57 +0100 |
---|---|---|
committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-01-14 23:24:00 +0000 |
commit | edf122a8cbe60d673205e83d627bdc383fb8687d (patch) | |
tree | ec562a71fca84930b1a78a1b0992cace43b602c6 /src/mainboard | |
parent | f4842bbc145da72c37321fed876b3140f79c6aa7 (diff) | |
download | coreboot-edf122a8cbe60d673205e83d627bdc383fb8687d.tar.gz coreboot-edf122a8cbe60d673205e83d627bdc383fb8687d.tar.bz2 coreboot-edf122a8cbe60d673205e83d627bdc383fb8687d.zip |
mb/lenovo/t520: Convert remaining PCI numbers into reference names
Change-Id: I18ce899516fd38b21ded1e3144aa22e705c534b8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79965
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/lenovo/t520/devicetree.cb | 4 | ||||
-rw-r--r-- | src/mainboard/lenovo/t520/variants/t520/overridetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/lenovo/t520/variants/w520/overridetree.cb | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index 3cb18b478903..de59198ec5bd 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -144,8 +144,8 @@ chip northbridge/intel/sandybridge device i2c 5f on end end end # SMBus - device pci 1f.5 off end # IDE controller - device pci 1f.6 off end # Thermal controller + device ref sata2 off end # IDE controller + device ref thermal off end # Thermal controller end end end diff --git a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb index d1634f81d668..b2c2839f0d67 100644 --- a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb +++ b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb @@ -2,7 +2,7 @@ chip northbridge/intel/sandybridge register "spd_addresses" = "{0x50, 0, 0x51, 0}" device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - device pci 1f.0 on # LPC bridge + device ref lpc on # LPC bridge chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "has_wwan_detection" = "1" diff --git a/src/mainboard/lenovo/t520/variants/w520/overridetree.cb b/src/mainboard/lenovo/t520/variants/w520/overridetree.cb index 4e03e753f44a..84d4dd6d9eda 100644 --- a/src/mainboard/lenovo/t520/variants/w520/overridetree.cb +++ b/src/mainboard/lenovo/t520/variants/w520/overridetree.cb @@ -2,7 +2,7 @@ chip northbridge/intel/sandybridge register "spd_addresses" = "{0x50, 0x52, 0x51, 0x53}" device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - device pci 1c.6 on end # PCIe Port #7 USB 3.0 + device ref pcie_rp7 on end # PCIe Port #7 USB 3.0 end end end |