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| author | Todd Broch <tbroch@chromium.org> | 2018-08-23 16:26:18 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-08-27 16:52:12 +0000 |
| commit | 5e90ef8c356099e42612bc97976c67092d0810ff (patch) | |
| tree | 2881a302a6d8be968e553023d0c2116379fe3bd7 /src/mainboard | |
| parent | 79f99f640ca7bc3180386ff1aa5cb7f877e13c44 (diff) | |
| download | coreboot-5e90ef8c356099e42612bc97976c67092d0810ff.tar.gz coreboot-5e90ef8c356099e42612bc97976c67092d0810ff.tar.bz2 coreboot-5e90ef8c356099e42612bc97976c67092d0810ff.zip | |
mb/google/poppy/variants/atlas: Update DPTF parameters
Reduce the CPU passive threshold sample rate from 5 seconds to 1
second so DPTF will react faster to rapid temperature increases.
Signed-off-by: Todd Broch <tbroch@chromium.org>
BUG=b:113101335
BRANCH=atlas
TEST=manual performance/power testing on nocturne.
No longer see messages like below in syslog,
'CPU0: Package temperature above threshold'
Change-Id: I2dc9d157b54500bae29e123978bb8ad6e05ef619
Reviewed-on: https://review.coreboot.org/28325
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl index 685f4ddd3613..85eb891c63f6 100644 --- a/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/poppy/variants/atlas/include/variant/acpi/dptf.asl @@ -50,7 +50,7 @@ Name (CHPS, Package () { Name (DTRT, Package () { /* CPU Throttle Effect on CPU */ - Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 10, 0, 0, 0, 0 }, /* CPU Throttle Effect on TSR0 */ Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 }, |