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| author | Werner Zeh <werner.zeh@siemens.com> | 2021-07-20 10:31:29 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-07-22 09:40:44 +0000 |
| commit | 9e57ed642d093d4f4c7b04aeab1e5803cd0bdece (patch) | |
| tree | 5401b265df85df08b185282a7aebaa101bbd47a4 /src/mainboard | |
| parent | c049c80eb1a775952c1e19bf1eb8d047b6929c21 (diff) | |
| download | coreboot-9e57ed642d093d4f4c7b04aeab1e5803cd0bdece.tar.gz coreboot-9e57ed642d093d4f4c7b04aeab1e5803cd0bdece.tar.bz2 coreboot-9e57ed642d093d4f4c7b04aeab1e5803cd0bdece.zip | |
mb/siemens/mc_ehl1: Remove display related UPDs from devicetree
Since mc_ehl1 does not have a display attached nor have a display
connector available (pure headless design), remove display related
settings from the devicetree.
Change-Id: Id31c09fcfba15f55eed19134bd0c2fb887bd2478
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56453
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb index 7c1d48aa148f..1c48c99c8a93 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb @@ -20,13 +20,6 @@ chip soc/intel/elkhartlake register "SmbusEnable" = "1" register "Heci2Enable" = "1" - # Display related UPDs - # Enable HPD for DDI ports C - register "DdiPortCHpd" = "1" - - # Enable DDC for DDI ports C - register "DdiPortCDdc" = "1" - # USB related UPDs register "usb2_ports[0]" = "USB2_PORT_MID(OC3)" # USB3/2 Type A port1 register "usb2_ports[1]" = "USB2_PORT_MID(OC3)" # USB2 WWAN |