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author | John Su <john_su@compal.corp-partner.google.com> | 2023-01-03 15:41:57 +0800 |
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committer | Martin L Roth <gaumless@gmail.com> | 2023-01-05 17:59:09 +0000 |
commit | 2819edb4972022715c6518078dbde3e44937cdd5 (patch) | |
tree | 93352edae4c7eb897cc3f4c430e2be1f48a3049a /src/mainboard | |
parent | 692fc58a6fb0788db6231a09ad8e027ad4cfa224 (diff) | |
download | coreboot-2819edb4972022715c6518078dbde3e44937cdd5.tar.gz coreboot-2819edb4972022715c6518078dbde3e44937cdd5.tar.bz2 coreboot-2819edb4972022715c6518078dbde3e44937cdd5.zip |
mb/google/skyrim/var/markarth: Update GPIO settings
Configure GPIOs based on b/263534907#comment4 from EE.
BUG=b:263534907, b:263216451
BRANCH=None
TEST=FW_NAME=markarth emerge-skyrim coreboot
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Change-Id: I5346a4322a6538d69d3482948166cfb5bd182021
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71635
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/google/skyrim/variants/markarth/Makefile.inc | 1 | ||||
-rw-r--r-- | src/mainboard/google/skyrim/variants/markarth/gpio.c | 27 |
2 files changed, 28 insertions, 0 deletions
diff --git a/src/mainboard/google/skyrim/variants/markarth/Makefile.inc b/src/mainboard/google/skyrim/variants/markarth/Makefile.inc index 88e75bde52c2..83f770047cc9 100644 --- a/src/mainboard/google/skyrim/variants/markarth/Makefile.inc +++ b/src/mainboard/google/skyrim/variants/markarth/Makefile.inc @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-or-later subdirs-y += ./memory +ramstage-y += gpio.c diff --git a/src/mainboard/google/skyrim/variants/markarth/gpio.c b/src/mainboard/google/skyrim/variants/markarth/gpio.c new file mode 100644 index 000000000000..9753179b09c7 --- /dev/null +++ b/src/mainboard/google/skyrim/variants/markarth/gpio.c @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <gpio.h> + +/* GPIO configuration in ramstage */ +static const struct soc_amd_gpio override_gpio_table[] = { + + /* SOC_PEN_DETECT_ODL => Unused */ + PAD_NC(GPIO_3), + /* EN_PWR_FP => Unused */ + PAD_NC(GPIO_4), + /* EN_PWR_WWAN_X => Unused */ + PAD_NC(GPIO_8), + /* SOC_FP_INT_L => Unused */ + PAD_NC(GPIO_24), + /* SD_AUX_RST_SOC_L => Unused */ + PAD_NC(GPIO_27), + /* WWAN_RST_L => Unused */ + PAD_NC(GPIO_42), +}; + +void variant_override_gpio_table(const struct soc_amd_gpio **gpio, size_t *size) +{ + *size = ARRAY_SIZE(override_gpio_table); + *gpio = override_gpio_table; +} |