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| author | Kevin Paul Herbert <kph@meraki.net> | 2014-12-24 18:43:20 -0800 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2015-02-15 08:50:22 +0100 |
| commit | bde6d309dfafe58732ec46314a2d4c08974b62d4 (patch) | |
| tree | 17ba00565487ddfbb5759c96adfbb3fffe2a4550 /src/northbridge/intel/i855 | |
| parent | 4b10dec1a66122b515b2191f823d7fd379ec655f (diff) | |
| download | coreboot-bde6d309dfafe58732ec46314a2d4c08974b62d4.tar.gz coreboot-bde6d309dfafe58732ec46314a2d4c08974b62d4.tar.bz2 coreboot-bde6d309dfafe58732ec46314a2d4c08974b62d4.zip | |
x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
On x86, change the type of the address parameter in
read8()/read16/read32()/write8()/write16()/write32() to be a
pointer, instead of unsigned long.
Change-Id: Ic26dd8a72d82828b69be3c04944710681b7bd330
Signed-off-by: Kevin Paul Herbert <kph@meraki.net>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/7784
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/intel/i855')
| -rw-r--r-- | src/northbridge/intel/i855/raminit.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i855/raminit.c b/src/northbridge/intel/i855/raminit.c index 39e12d2d0fe8..f0cc5a90b330 100644 --- a/src/northbridge/intel/i855/raminit.c +++ b/src/northbridge/intel/i855/raminit.c @@ -393,7 +393,7 @@ static void do_ram_command(uint8_t command, uint16_t jedec_mode_bits) uint32_t dimm_start_address = dimm_start_32M_multiple << 25; PRINTK_DEBUG(" Sending RAM command to 0x%08x\n", dimm_start_address + i855_mode_bits); - read32(dimm_start_address + i855_mode_bits); + read32((void *)(dimm_start_address + i855_mode_bits)); // Set the start of the next DIMM dimm_start_32M_multiple = dimm_end_32M_multiple; |