summaryrefslogtreecommitdiffstats
path: root/src/northbridge/intel/sandybridge/raminit_mrc.c
diff options
context:
space:
mode:
authorElyes HAOUAS <ehaouas@noos.fr>2020-07-10 11:18:11 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-26 20:58:20 +0000
commit1d6484a858573a029a492415b4ee99414ef45789 (patch)
tree955e07913ee3baf4a7bd116b2e7eb120ff0a7461 /src/northbridge/intel/sandybridge/raminit_mrc.c
parentf50b6625d97199535925af46405414077a41f2d1 (diff)
downloadcoreboot-1d6484a858573a029a492415b4ee99414ef45789.tar.gz
coreboot-1d6484a858573a029a492415b4ee99414ef45789.tar.bz2
coreboot-1d6484a858573a029a492415b4ee99414ef45789.zip
nb/intel/sandybridge: Add missing includes
Change-Id: I9d54d0923a595734a84256ddcafb9dae17615cb0 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43348 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit_mrc.c')
-rw-r--r--src/northbridge/intel/sandybridge/raminit_mrc.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index cea32afa35c6..b6b3989790e2 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -14,6 +14,8 @@
#include <device/pci_def.h>
#include <lib.h>
#include <mrc_cache.h>
+#include <stddef.h>
+#include <stdint.h>
#include <timestamp.h>
#include "raminit.h"
#include "pei_data.h"