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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-06 10:46:22 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2013-09-11 07:18:53 +0200 |
commit | f9f74afdd7b39c12d399a900f3af326a33c87387 (patch) | |
tree | 064d869087e861b668eb79b07203d0c40cc772d1 /src/northbridge/via | |
parent | bc90e15d3f8e841ccf229fca5d7df99436ff4bdb (diff) | |
download | coreboot-f9f74afdd7b39c12d399a900f3af326a33c87387.tar.gz coreboot-f9f74afdd7b39c12d399a900f3af326a33c87387.tar.bz2 coreboot-f9f74afdd7b39c12d399a900f3af326a33c87387.zip |
CBMEM x86: Unify get_cbmem_toc()
Remove any chipset-specific implementations and use arch-specific
implementation of get_cbmem_table() instead.
Change-Id: I338ee2c1bd51f5e517462115170dc926e040159e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3907
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/northbridge/via')
-rw-r--r-- | src/northbridge/via/vx900/early_vx900.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/src/northbridge/via/vx900/early_vx900.c b/src/northbridge/via/vx900/early_vx900.c index 2439c8db4c38..2896680b326d 100644 --- a/src/northbridge/via/vx900/early_vx900.c +++ b/src/northbridge/via/vx900/early_vx900.c @@ -27,11 +27,6 @@ unsigned long get_top_of_ram(void) return (((unsigned long)reg_tom) << 24) - (256 << 20); } -struct cbmem_entry *get_cbmem_toc(void) -{ - return (struct cbmem_entry *)(get_top_of_ram() - HIGH_MEMORY_SIZE); -} - /** * \brief Enable accessing of PCI configuration space for all devices. * |