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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2020-08-20 16:50:01 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-06-15 07:49:54 +0000 |
| commit | b50b6a5fa7e3d1810ab60dcc9b646ab7914b79e3 (patch) | |
| tree | 33f3b41e29717dcf8068b231c09d8f8b33173dd5 /src/northbridge | |
| parent | ed8d777cecf7162a688b4683a4d39333999dcfc7 (diff) | |
| download | coreboot-b50b6a5fa7e3d1810ab60dcc9b646ab7914b79e3.tar.gz coreboot-b50b6a5fa7e3d1810ab60dcc9b646ab7914b79e3.tar.bz2 coreboot-b50b6a5fa7e3d1810ab60dcc9b646ab7914b79e3.zip | |
nb/intel/sandybridge: Add x86_64 support
Fix compilation on x86_64 by using compatible types.
The MRC blob isn't supported yet as there's no x86_32 wrapper.
Tested on HP8200:
* Still boots on x86_32.
* Boots to payload in x86_64
Change-Id: Iab29a87d52ad3f6c480f21a3b8389a7f49cb5dd8
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44677
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.c | 29 |
1 files changed, 19 insertions, 10 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 62a213961bc1..4b5f2b3a242a 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -1509,9 +1509,12 @@ static void fill_pattern0(ramctr_timing *ctrl, int channel, u32 a, u32 b) { unsigned int j; unsigned int channel_offset = get_precedening_channels(ctrl, channel) * 64; + uintptr_t addr; - for (j = 0; j < 16; j++) - write32((void *)(0x04000000 + channel_offset + 4 * j), j & 2 ? b : a); + for (j = 0; j < 16; j++) { + addr = 0x04000000 + channel_offset + 4 * j; + write32((void *)addr, j & 2 ? b : a); + } sfence(); @@ -1531,13 +1534,16 @@ static void fill_pattern1(ramctr_timing *ctrl, int channel) unsigned int j; unsigned int channel_offset = get_precedening_channels(ctrl, channel) * 64; unsigned int channel_step = 64 * num_of_channels(ctrl); + uintptr_t addr; - for (j = 0; j < 16; j++) - write32((void *)(0x04000000 + channel_offset + j * 4), 0xffffffff); - - for (j = 0; j < 16; j++) - write32((void *)(0x04000000 + channel_offset + channel_step + j * 4), 0); - + for (j = 0; j < 16; j++) { + addr = 0x04000000 + channel_offset + j * 4; + write32((void *)addr, 0xffffffff); + } + for (j = 0; j < 16; j++) { + addr = 0x04000000 + channel_offset + channel_step + j * 4; + write32((void *)addr, 0); + } sfence(); program_wdb_pattern_length(channel, 16); @@ -1929,6 +1935,7 @@ static void fill_pattern5(ramctr_timing *ctrl, int channel, int patno) unsigned int i, j; unsigned int offset = get_precedening_channels(ctrl, channel) * 64; unsigned int step = 64 * num_of_channels(ctrl); + uintptr_t addr; if (patno) { u8 base8 = 0x80 >> ((patno - 1) % 8); @@ -1940,14 +1947,16 @@ static void fill_pattern5(ramctr_timing *ctrl, int channel, int patno) if (invert[patno - 1][i] & (1 << (j / 2))) val = ~val; - write32((void *)((1 << 26) + offset + i * step + j * 4), val); + addr = (1 << 26) + offset + i * step + j * 4; + write32((void *)addr, val); } } } else { for (i = 0; i < ARRAY_SIZE(pattern); i++) { for (j = 0; j < 16; j++) { const u32 val = pattern[i][j]; - write32((void *)((1 << 26) + offset + i * step + j * 4), val); + addr = (1 << 26) + offset + i * step + j * 4; + write32((void *)addr, val); } } sfence(); |