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| author | Angel Pons <th3fanbus@gmail.com> | 2021-05-26 14:24:06 +0200 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2021-05-28 10:05:37 +0000 |
| commit | d059112eec64f79cf6a62197a96769cbd104252a (patch) | |
| tree | e20e61f5f88e950b0b525388ec7378d0a80cc7c4 /src/northbridge | |
| parent | f696d797dcc162e8ed27a6720d1253f00a5f0128 (diff) | |
| download | coreboot-d059112eec64f79cf6a62197a96769cbd104252a.tar.gz coreboot-d059112eec64f79cf6a62197a96769cbd104252a.tar.bz2 coreboot-d059112eec64f79cf6a62197a96769cbd104252a.zip | |
nb/intel/x4x/rcven.c: Guard macro parameters
Add parentheses around macro parameters to avoid operation order issues.
Change-Id: I9528f3d6b221854fddd2db6d2b45c63bfdda0092
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54953
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/x4x/rcven.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/rcven.c b/src/northbridge/intel/x4x/rcven.c index d3b1b31d527e..9e58ef33c0b7 100644 --- a/src/northbridge/intel/x4x/rcven.c +++ b/src/northbridge/intel/x4x/rcven.c @@ -10,7 +10,7 @@ #define DQS_HIGH 1 #define DQS_LOW 0 -#define RESET_CNTL(channel) (0x5d8 + channel * 0x400) +#define RESET_CNTL(channel) (0x5d8 + (channel) * 0x400) struct rec_timing { u8 medium; |