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| author | Krystian Hebel <krystian.hebel@3mdeb.com> | 2024-05-13 12:24:37 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-05-27 12:43:50 +0000 |
| commit | 5ba17d5ccbc0938c0e657b77183d2483ad589033 (patch) | |
| tree | 982455637cecea28d2330b282c22030053cf1feb /src/security | |
| parent | ca88b5f0aca3b1dce29baa1c57e02d3202dea29c (diff) | |
| download | coreboot-5ba17d5ccbc0938c0e657b77183d2483ad589033.tar.gz coreboot-5ba17d5ccbc0938c0e657b77183d2483ad589033.tar.bz2 coreboot-5ba17d5ccbc0938c0e657b77183d2483ad589033.zip | |
security/memory_clear: fix wrong size of reserved memory range
The code used to reserve MEMSET_PAE_PGTL_SIZE (20 KiB) for page used
for clearing the memory above 4 GiB that was assumed to be 2 MiB page.
memset_pae() checks only the alignment and not the size of this region,
so no error was reported by it.
In most cases this reserved memory in 2-4 MiB range, and because this
range isn't usually used by coreboot (architectural stuff is located in
lower 1 MiB, coreboot tables and ramstage are close to TOLUM and payload
isn't yet loaded when the broken code is executed), it never caused any
problems.
Change MEMSET_PAE_PGTL_SIZE to MEMSET_PAE_VMEM_SIZE and fix wrong macro
definition to reserve properly sized region.
Change-Id: I0df15b0d1767196fe70be14d94428ccdf8dbd5d3
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82397
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/security')
| -rw-r--r-- | src/security/memory/memory_clear.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/security/memory/memory_clear.c b/src/security/memory/memory_clear.c index 03c6f8bd75a9..996b1d380253 100644 --- a/src/security/memory/memory_clear.c +++ b/src/security/memory/memory_clear.c @@ -6,8 +6,8 @@ #define memset_pae(a, b, c, d, e) 0 #define MEMSET_PAE_PGTL_ALIGN 0 #define MEMSET_PAE_PGTL_SIZE 0 -#define MEMSET_PAE_PGTL_SIZE 0 #define MEMSET_PAE_VMEM_ALIGN 0 +#define MEMSET_PAE_VMEM_SIZE 0 #endif #include <memrange.h> @@ -92,7 +92,7 @@ static void clear_memory(void *unused) BM_MEM_TABLE); vmem_addr = get_free_memory_range(&mem, MEMSET_PAE_VMEM_ALIGN, - MEMSET_PAE_PGTL_SIZE); + MEMSET_PAE_VMEM_SIZE); printk(BIOS_SPEW, "%s: pgtbl at %p, virt memory at %p\n", __func__, (void *)pgtbl, (void *)vmem_addr); |