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| author | Felix Held <felix.held@amd.corp-partner.google.com> | 2021-10-14 21:35:55 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-15 20:04:28 +0000 |
| commit | f38fbbec2c0061d122466cec346c2634aa26e236 (patch) | |
| tree | 772c5e1517b85b955c3a1cf8c039216ea3b8480e /src/soc/amd/cezanne | |
| parent | 640ec2581b1cdbb9dca385b49a32d2bdb1d4d9c5 (diff) | |
| download | coreboot-f38fbbec2c0061d122466cec346c2634aa26e236.tar.gz coreboot-f38fbbec2c0061d122466cec346c2634aa26e236.tar.bz2 coreboot-f38fbbec2c0061d122466cec346c2634aa26e236.zip | |
soc/amd/common/include/espi: rename configure_espi
Rename configure_espi to configure_espi_with_mb_hook to clarify that
this function will call into the mb_set_up_early_espi function in the
mainboard-specific code if it exists.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I5d0f099288b0100242629c736dd69a8add977b5b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58338
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/cezanne')
| -rw-r--r-- | src/soc/amd/cezanne/early_fch.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c index 69458b6220da..f97f57c8462c 100644 --- a/src/soc/amd/cezanne/early_fch.c +++ b/src/soc/amd/cezanne/early_fch.c @@ -41,7 +41,7 @@ void fch_pre_init(void) /* Setup SPI base by calling lpc_early_init before setting up eSPI. */ lpc_early_init(); /* Setup eSPI to enable port80 routing. */ - configure_espi(); + configure_espi_with_mb_hook(); fch_spi_early_init(); fch_smbus_init(); fch_enable_cf9_io(); |