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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-10-05 14:36:55 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-10-14 20:18:45 +0000 |
| commit | fd2bb9b6bc06515f2a42a8575812271765f73313 (patch) | |
| tree | 65ef4e7844b8f34a9c1e81f4a5025c3cde2bc7f6 /src/soc/amd/stoneyridge/chipset_st.cb | |
| parent | 65d73cc4573a23b4d98e3156cc1c4d0a1b09cb96 (diff) | |
| download | coreboot-fd2bb9b6bc06515f2a42a8575812271765f73313.tar.gz coreboot-fd2bb9b6bc06515f2a42a8575812271765f73313.tar.bz2 coreboot-fd2bb9b6bc06515f2a42a8575812271765f73313.zip | |
soc/amd/*: Hook up SMBus ops to devicetree
This removes the need for a PCI driver.
Change-Id: Iab75f8c28a247f1370f4425e19cc215678bfa3e5
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68140
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/stoneyridge/chipset_st.cb')
| -rw-r--r-- | src/soc/amd/stoneyridge/chipset_st.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/chipset_st.cb b/src/soc/amd/stoneyridge/chipset_st.cb index 3544ea82671f..743822b37270 100644 --- a/src/soc/amd/stoneyridge/chipset_st.cb +++ b/src/soc/amd/stoneyridge/chipset_st.cb @@ -22,7 +22,7 @@ chip soc/amd/stoneyridge device pci 10.0 alias xhci off ops stoneyridge_usb_ops end device pci 11.0 alias sata off end device pci 12.0 alias ehci off ops stoneyridge_usb_ops end - device pci 14.0 alias smbus on end # primary FCH function + device pci 14.0 alias smbus on ops amd_smbus_ops end # primary FCH function device pci 14.3 alias lpc_bridge on end device pci 14.7 alias sdhci off end device pci 18.0 alias ht_0 on end |