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| author | lilacious <yuchenhe126@gmail.com> | 2023-06-21 23:24:14 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-06-23 15:06:04 +0000 |
| commit | 40cb3fe94dacfba0b146aae2be9c03c0a0ddb691 (patch) | |
| tree | 9dc68ba4ab1d8033939e1a872b374fc2ef3ba504 /src/soc/intel/cannonlake/bootblock | |
| parent | bb4bc777b7b6566cd030f2c4eef4b5e2c8425349 (diff) | |
| download | coreboot-40cb3fe94dacfba0b146aae2be9c03c0a0ddb691.tar.gz coreboot-40cb3fe94dacfba0b146aae2be9c03c0a0ddb691.tar.bz2 coreboot-40cb3fe94dacfba0b146aae2be9c03c0a0ddb691.zip | |
commonlib/console/post_code.h: Change post code prefix to POSTCODE
The prefix POSTCODE makes it clear that the macro is a post code.
Hence, replace related macros starting with POST to POSTCODE and
also replace every instance the macros are invoked with the new
name.
The files was changed by running the following bash script from the
top level directory.
sed -i'' '30,${s/#define POST/#define POSTCODE/g;}' \
src/commonlib/include/commonlib/console/post_codes.h;
myArray=`grep -e "^#define POSTCODE_" \
src/commonlib/include/commonlib/console/post_codes.h | \
grep -v "POST_CODES_H" | tr '\t' ' ' | cut -d ' ' -f 2`;
for str in ${myArray[@]}; do
splitstr=`echo $str | cut -d '_' -f2-`
grep -r POST_$splitstr src | \
cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g";
grep -r "POST_$splitstr" util/cbfstool | \
cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g";
done
Change-Id: I25db79fa15f032c08678f66d86c10c928b7de9b8
Signed-off-by: lilacious <yuchenhe126@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76043
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/bootblock')
| -rw-r--r-- | src/soc/intel/cannonlake/bootblock/pch.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c index 9df4ac35b9bf..837f1573f801 100644 --- a/src/soc/intel/cannonlake/bootblock/pch.c +++ b/src/soc/intel/cannonlake/bootblock/pch.c @@ -84,7 +84,7 @@ static void soc_config_acpibase(void) pmc_base_reg = get_pmc_reg_base(); if (!pmc_base_reg) - die_with_post_code(POST_HW_INIT_FAILURE, + die_with_post_code(POSTCODE_HW_INIT_FAILURE, "Invalid PMC base address\n"); pmc_reg_value = pcr_read32(PID_PSF3, pmc_base_reg + |