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| author | Duncan Laurie <dlaurie@google.com> | 2020-10-27 10:26:18 -0700 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2020-10-30 18:34:19 +0000 |
| commit | 0f5a17e98092dd6f340582ede5d481e53f90a06c (patch) | |
| tree | 9fedba91c13bf5ff689a0142613608009bca4667 /src/soc/intel/common/block/usb4 | |
| parent | 53b465d1c19502776853c236dbc7afb2c53f0c87 (diff) | |
| download | coreboot-0f5a17e98092dd6f340582ede5d481e53f90a06c.tar.gz coreboot-0f5a17e98092dd6f340582ede5d481e53f90a06c.tar.bz2 coreboot-0f5a17e98092dd6f340582ede5d481e53f90a06c.zip | |
soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation
In order to generate ACPI entries for USB devices attached to the
USB4/TBT/TCSS/North XHCI device it needs to have a driver that will
enumerate static devices on the bus. This driver does that and nothing
else.
BUG=b:151731851
TEST=boot on volteer and check for USB devices on \_SB.PCI0.TXHC.RHUB
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Change-Id: I5a2ff1cd1bed557e793d45119232cf87032ddd7b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46851
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/usb4')
| -rw-r--r-- | src/soc/intel/common/block/usb4/Kconfig | 7 | ||||
| -rw-r--r-- | src/soc/intel/common/block/usb4/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/intel/common/block/usb4/xhci.c | 37 |
3 files changed, 45 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/usb4/Kconfig b/src/soc/intel/common/block/usb4/Kconfig index be0b3782b0f5..fb876e1fd98f 100644 --- a/src/soc/intel/common/block/usb4/Kconfig +++ b/src/soc/intel/common/block/usb4/Kconfig @@ -11,3 +11,10 @@ config SOC_INTEL_COMMON_BLOCK_USB4_PCIE help Chip driver for adding PCI ops and SSDT generation for common Intel USB4/Thunderbolt root ports. + +config SOC_INTEL_COMMON_BLOCK_USB4_XHCI + bool + default n + help + Minimal PCI driver for adding PCI ops and SSDT generation for common + Intel USB4/Thunderbolt North XHCI ports. diff --git a/src/soc/intel/common/block/usb4/Makefile.inc b/src/soc/intel/common/block/usb4/Makefile.inc index 89ce426ae20b..91f0991534c4 100644 --- a/src/soc/intel/common/block/usb4/Makefile.inc +++ b/src/soc/intel/common/block/usb4/Makefile.inc @@ -1,2 +1,3 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4) += usb4.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE) += pcie.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI) += xhci.c diff --git a/src/soc/intel/common/block/usb4/xhci.c b/src/soc/intel/common/block/usb4/xhci.c new file mode 100644 index 000000000000..4fe60dd91a51 --- /dev/null +++ b/src/soc/intel/common/block/usb4/xhci.c @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <intelblocks/acpi.h> +#include <soc/pci_devs.h> + +static const char *usb4_xhci_acpi_name(const struct device *dev) +{ + if (dev->path.type != DEVICE_PATH_PCI) + return NULL; + + return "TXHC"; +} + +static struct device_operations usb4_xhci_ops = { + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .ops_pci = &pci_dev_ops_pci, + .scan_bus = scan_static_bus, +#if CONFIG(HAVE_ACPI_TABLES) + .acpi_name = usb4_xhci_acpi_name, +#endif +}; + +static const unsigned short pci_device_ids[] = { + PCI_DEVICE_ID_INTEL_TGP_TCSS_XHCI, + 0 +}; + +static const struct pci_driver usb4_xhci __pci_driver = { + .ops = &usb4_xhci_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .devices = pci_device_ids, +}; |