summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/fsp_broadwell_de/include
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-12 15:38:38 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-13 19:28:19 +0000
commite9dcc7a3c52a3bdfa172d308a18fb7f3875f644b (patch)
treeb6242bbdce7282a8dd1b55f306114cd5bdc2fdf4 /src/soc/intel/fsp_broadwell_de/include
parentfd15c99f4eb80eb93c56c5141804c4bd55a45709 (diff)
downloadcoreboot-e9dcc7a3c52a3bdfa172d308a18fb7f3875f644b.tar.gz
coreboot-e9dcc7a3c52a3bdfa172d308a18fb7f3875f644b.tar.bz2
coreboot-e9dcc7a3c52a3bdfa172d308a18fb7f3875f644b.zip
soc/intel: Remove some __PRE_RAM__ use
Change-Id: I35b44967de4e8d9907dc887fe35407bcaf334adc Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35379 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/fsp_broadwell_de/include')
-rw-r--r--src/soc/intel/fsp_broadwell_de/include/soc/romstage.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/romstage.h b/src/soc/intel/fsp_broadwell_de/include/soc/romstage.h
index 63b7fbaff9b2..6ee160de2861 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/romstage.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/romstage.h
@@ -17,10 +17,6 @@
#ifndef _SOC_ROMSTAGE_H_
#define _SOC_ROMSTAGE_H_
-#if !defined(__PRE_RAM__)
-#error "Don't include romstage.h from a ramstage compilation unit!"
-#endif
-
#include <stdint.h>
#include <fsp.h>