diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-07-25 10:14:07 -0700 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2016-08-05 01:53:49 +0200 |
| commit | f26fc0f28bf62dd34533aea47105f174ee794e66 (patch) | |
| tree | 5bcb26ddc174f46ff7acbd5ab6689320c74f9a99 /src/soc/intel/quark/include/soc/pm.h | |
| parent | 102f6253600cfa3f741c0d1d126436d612daa203 (diff) | |
| download | coreboot-f26fc0f28bf62dd34533aea47105f174ee794e66.tar.gz coreboot-f26fc0f28bf62dd34533aea47105f174ee794e66.tar.bz2 coreboot-f26fc0f28bf62dd34533aea47105f174ee794e66.zip | |
soc/intel/quark: Add FSP 2.0 romstage support
Add the pieces necessary to successfully build and run romstage using
the FSP 2.0 build. Because romstage is using postcar, add the postcar
pieces so that romstage can attempt to load postcar.
TEST=Build and run on Galileo Gen2
Change-Id: I66b3437e3c7840223535f6ab643599c9e4924968
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15866
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark/include/soc/pm.h')
| -rw-r--r-- | src/soc/intel/quark/include/soc/pm.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/soc/intel/quark/include/soc/pm.h b/src/soc/intel/quark/include/soc/pm.h index 7547a53605d1..55e5e956aa7b 100644 --- a/src/soc/intel/quark/include/soc/pm.h +++ b/src/soc/intel/quark/include/soc/pm.h @@ -25,6 +25,10 @@ struct chipset_power_state { } __attribute__ ((packed)); struct chipset_power_state *get_power_state(void); +#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1) struct chipset_power_state *fill_power_state(void); - +#else +int fill_power_state(void); #endif + +#endif /* _SOC_PM_H_ */ |