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| author | Subrata Banik <subratabanik@google.com> | 2022-01-28 03:12:35 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-02-02 07:34:39 +0000 |
| commit | be3e911d53b1df8ba650eba5ddbd057119156684 (patch) | |
| tree | 706cd176905624b4f4ae5c6d244725a2747a0640 /src/soc/intel/skylake/Kconfig | |
| parent | e49a615320c16bd05e26a2d863eb64ddd65eb61b (diff) | |
| download | coreboot-be3e911d53b1df8ba650eba5ddbd057119156684.tar.gz coreboot-be3e911d53b1df8ba650eba5ddbd057119156684.tar.bz2 coreboot-be3e911d53b1df8ba650eba5ddbd057119156684.zip | |
soc/intel/skylake: Use PCR write to disable HECI1
Set the SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR config for
Skylake to disable HECI1 device using PCR writes.
BUG=none
TEST=None
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ib6bfa7c48660a6df8d0944de675a4f30fe248d1b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel/skylake/Kconfig')
| -rw-r--r-- | src/soc/intel/skylake/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index b90fdefe76dc..31e733cba9b7 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -63,6 +63,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL select SOC_INTEL_COMMON_BLOCK_GSPI select SOC_INTEL_COMMON_BLOCK_HDA + select SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PCR if DISABLE_HECI1_AT_PRE_BOOT select SOC_INTEL_COMMON_BLOCK_PMC_DISCOVERABLE select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SCS |