diff options
author | Jonathan Zhang <jonzhang@meta.com> | 2023-01-23 10:55:09 -0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-17 12:34:27 +0000 |
commit | 43277976edaba62f91d16d48f044b443a1e5da7b (patch) | |
tree | 13423b3c9d7ae634eac21cfd332eb47a52cce6df /src/soc/intel/xeon_sp/lockdown.c | |
parent | 21fbf84d219244f6806cf6ba5cef59bcba32c37d (diff) | |
download | coreboot-43277976edaba62f91d16d48f044b443a1e5da7b.tar.gz coreboot-43277976edaba62f91d16d48f044b443a1e5da7b.tar.bz2 coreboot-43277976edaba62f91d16d48f044b443a1e5da7b.zip |
soc/intel/xeon_sp: move PCH specific code into lbg directory
pmc_lock_smi() and pmc_lockdown_config() have PCH specific
implementations. Move them from common lockdown.c and pmc.c
into lbg/soc_pmutil.c.
Move sata_lockdown_config() and spi_lockdown_config() to
lbg/lockdown.c.
While here, fix some coding style issues.
Change-Id: I9b357ce877123530dd5c310a730808b6e651712e
Signed-off-by: Jonathan Zhang <jonzhang@meta.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72396
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Simon Chou <simonchou@supermicro.com.tw>
Reviewed-by: Jian-Ming Wang <jianmingW@supermicro.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/lockdown.c')
-rw-r--r-- | src/soc/intel/xeon_sp/lockdown.c | 35 |
1 files changed, 3 insertions, 32 deletions
diff --git a/src/soc/intel/xeon_sp/lockdown.c b/src/soc/intel/xeon_sp/lockdown.c index 7dc1f9834f3f..9e25920011b9 100644 --- a/src/soc/intel/xeon_sp/lockdown.c +++ b/src/soc/intel/xeon_sp/lockdown.c @@ -1,12 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <device/mmio.h> -#include <device/pci.h> -#include <intelblocks/cfg.h> #include <intelblocks/lpc_lib.h> -#include <intelblocks/pmclib.h> #include <intelpch/lockdown.h> -#include <soc/pci_devs.h> +#include <soc/lockdown.h> #include <soc/pm.h> static void lpc_lockdown_config(void) @@ -22,35 +18,10 @@ static void lpc_lockdown_config(void) lpc_set_lock_enable(); } -static void pmc_lockdown_config(int chipset_lockdown) -{ - uint8_t *pmcbase; - u32 pmsyncreg; - - /* PMSYNC */ - pmcbase = pmc_mmio_regs(); - pmsyncreg = read32(pmcbase + PMSYNC_TPR_CFG); - pmsyncreg |= PMSYNC_LOCK; - write32(pmcbase + PMSYNC_TPR_CFG, pmsyncreg); - - /* Make sure payload/OS can't trigger global reset */ - pmc_global_reset_disable_and_lock(); - - /* Lock PMC stretch policy */ - pci_or_config32(PCH_DEV_PMC, GEN_PMCON_B, SLP_STR_POL_LOCK); -} - -static void sata_lockdown_config(int chipset_lockdown) -{ - if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) { - pci_or_config32(PCH_DEV_SATA, SATAGC, SATAGC_REGLOCK); - pci_or_config32(PCH_DEV_SSATA, SATAGC, SATAGC_REGLOCK); - } -} - void soc_lockdown_config(int chipset_lockdown) { lpc_lockdown_config(); - pmc_lockdown_config(chipset_lockdown); + pmc_lockdown_config(); sata_lockdown_config(chipset_lockdown); + spi_lockdown_config(chipset_lockdown); } |