diff options
| author | Lin Huang <hl@rock-chips.com> | 2016-11-15 11:40:58 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-12-06 21:56:20 +0100 |
| commit | f00af5833abd0792429ffb28c551eedb7b59aafc (patch) | |
| tree | 0d96a364fbd32266d7df1c279dda9fb7b89222d6 /src/soc | |
| parent | c49782cbe7a79cca03c3c20c647211367bb0a03e (diff) | |
| download | coreboot-f00af5833abd0792429ffb28c551eedb7b59aafc.tar.gz coreboot-f00af5833abd0792429ffb28c551eedb7b59aafc.tar.bz2 coreboot-f00af5833abd0792429ffb28c551eedb7b59aafc.zip | |
rockchip/rk3399: sdram: use register to calculate sdram sizes
We may support different sdram sizes on one board in future, so
we need to calculate sdram sizes from sdram drvier.
BRANCH=None
BUG=None
TEST=boot kevin
Change-Id: I43e8f164ecdb768c051464b4dbc7d890df8055d0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3c4d8b3cb647b2f9cebc416c298817c16d49330e
Original-Change-Id: I95d5ef34de9d79ebca3600dc7a4b9e14449606ff
Original-Signed-off-by: Lin Huang <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/411600
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/17629
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/rockchip/rk3399/sdram.c | 38 | ||||
| -rw-r--r-- | src/soc/rockchip/rk3399/soc.c | 4 |
2 files changed, 39 insertions, 3 deletions
diff --git a/src/soc/rockchip/rk3399/sdram.c b/src/soc/rockchip/rk3399/sdram.c index d085e4c44e15..e51cd8968d36 100644 --- a/src/soc/rockchip/rk3399/sdram.c +++ b/src/soc/rockchip/rk3399/sdram.c @@ -1031,5 +1031,41 @@ void sdram_init(const struct rk3399_sdram_params *sdram_params) size_t sdram_size_mb(void) { - return CONFIG_DRAM_SIZE_MB; + u32 rank, col, bk, cs0_row, cs1_row, bw, row_3_4; + size_t chipsize_mb = 0; + static size_t size_mb = 0; + u32 ch; + + if (!size_mb) { + u32 sys_reg = read32(&rk3399_pmugrf->os_reg2); + u32 ch_num = SYS_REG_DEC_NUM_CH(sys_reg); + + for (ch = 0; ch < ch_num; ch++) { + rank = SYS_REG_DEC_RANK(sys_reg, ch); + col = SYS_REG_DEC_COL(sys_reg, ch); + bk = SYS_REG_DEC_BK(sys_reg, ch); + cs0_row = SYS_REG_DEC_CS0_ROW(sys_reg, ch); + cs1_row = SYS_REG_DEC_CS1_ROW(sys_reg, ch); + bw = SYS_REG_DEC_BW(sys_reg, ch); + row_3_4 = SYS_REG_DEC_ROW_3_4(sys_reg, ch); + + chipsize_mb = (1 << (cs0_row + col + bk + bw - 20)); + + if (rank > 1) + chipsize_mb += chipsize_mb >> + (cs0_row - cs1_row); + if (row_3_4) + chipsize_mb = chipsize_mb * 3 / 4; + size_mb += chipsize_mb; + } + + /* + * we use the 0x00000000~0xf7ffffff space + * since 0xf8000000~0xffffffff is soc register space + * so we reserve it + */ + size_mb = MIN(size_mb, 0xf8000000/MiB); + } + + return size_mb; } diff --git a/src/soc/rockchip/rk3399/soc.c b/src/soc/rockchip/rk3399/soc.c index e34ca09d065a..4418a27a25cf 100644 --- a/src/soc/rockchip/rk3399/soc.c +++ b/src/soc/rockchip/rk3399/soc.c @@ -20,6 +20,7 @@ #include <soc/addressmap.h> #include <soc/clock.h> #include <soc/display.h> +#include <soc/sdram.h> #include <stddef.h> #include <stdlib.h> #include <string.h> @@ -27,8 +28,7 @@ static void soc_read_resources(device_t dev) { - ram_resource(dev, 0, (uintptr_t)_dram / KiB, - min(CONFIG_DRAM_SIZE_MB * KiB, MAX_DRAM_ADDRESS / KiB)); + ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size_mb() * KiB); } static void soc_init(device_t dev) |