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| author | Elyes Haouas <ehaouas@noos.fr> | 2023-01-05 07:42:24 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-01-09 20:32:41 +0000 |
| commit | 3cd06cc427199309956b745cd04447948a1f9a82 (patch) | |
| tree | 863355fb3057e8e5a0abfcf6392fd9db665205bf /src/soc | |
| parent | 6de377ef7887c875e0dd084e4ad45e717c9eec05 (diff) | |
| download | coreboot-3cd06cc427199309956b745cd04447948a1f9a82.tar.gz coreboot-3cd06cc427199309956b745cd04447948a1f9a82.tar.bz2 coreboot-3cd06cc427199309956b745cd04447948a1f9a82.zip | |
soc/amd: Remove dummy SOC_SPECIFIC_OPTIONS
Change-Id: I080b7b579338c3cf342beabda54f43f525d8b65c
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/cezanne/Kconfig | 11 | ||||
| -rw-r--r-- | src/soc/amd/glinda/Kconfig | 11 | ||||
| -rw-r--r-- | src/soc/amd/mendocino/Kconfig | 33 | ||||
| -rw-r--r-- | src/soc/amd/morgana/Kconfig | 11 | ||||
| -rw-r--r-- | src/soc/amd/picasso/Kconfig | 11 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/Kconfig | 11 |
6 files changed, 35 insertions, 53 deletions
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 30e3e73930de..0de2ab7b7772 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -2,13 +2,6 @@ config SOC_AMD_CEZANNE bool - help - AMD Cezanne support - -if SOC_AMD_CEZANNE - -config SOC_SPECIFIC_OPTIONS - def_bool y select ACPI_SOC_NVS select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH @@ -83,6 +76,10 @@ config SOC_SPECIFIC_OPTIONS select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI + help + AMD Cezanne support + +if SOC_AMD_CEZANNE config CHIPSET_DEVICETREE string diff --git a/src/soc/amd/glinda/Kconfig b/src/soc/amd/glinda/Kconfig index 5bf1d5f129c4..f4f49b922b5a 100644 --- a/src/soc/amd/glinda/Kconfig +++ b/src/soc/amd/glinda/Kconfig @@ -5,13 +5,6 @@ config SOC_AMD_GLINDA bool - help - AMD Glinda support - -if SOC_AMD_GLINDA - -config SOC_SPECIFIC_OPTIONS - def_bool y select ACPI_SOC_NVS select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH @@ -88,6 +81,10 @@ config SOC_SPECIFIC_OPTIONS select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI + help + AMD Glinda support + +if SOC_AMD_GLINDA config CHIPSET_DEVICETREE string diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig index 64cec5d030ff..f791038f54ba 100644 --- a/src/soc/amd/mendocino/Kconfig +++ b/src/soc/amd/mendocino/Kconfig @@ -2,24 +2,6 @@ config SOC_AMD_REMBRANDT_BASE bool - -config SOC_AMD_MENDOCINO - bool - select SOC_AMD_REMBRANDT_BASE - help - AMD Mendocino support - -config SOC_AMD_REMBRANDT - bool - select SOC_AMD_REMBRANDT_BASE - help - AMD Rembrandt support - - -if SOC_AMD_REMBRANDT_BASE - -config SOC_SPECIFIC_OPTIONS - def_bool y select ACPI_SOC_NVS select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH @@ -101,6 +83,21 @@ config SOC_SPECIFIC_OPTIONS select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI +config SOC_AMD_MENDOCINO + bool + select SOC_AMD_REMBRANDT_BASE + help + AMD Mendocino support + +config SOC_AMD_REMBRANDT + bool + select SOC_AMD_REMBRANDT_BASE + help + AMD Rembrandt support + + +if SOC_AMD_REMBRANDT_BASE + config CHIPSET_DEVICETREE string default "soc/amd/mendocino/chipset_mendocino.cb" if SOC_AMD_MENDOCINO diff --git a/src/soc/amd/morgana/Kconfig b/src/soc/amd/morgana/Kconfig index ce575401feb1..11fe0c4a6973 100644 --- a/src/soc/amd/morgana/Kconfig +++ b/src/soc/amd/morgana/Kconfig @@ -5,13 +5,6 @@ config SOC_AMD_MORGANA bool - help - AMD Morgana support - -if SOC_AMD_MORGANA - -config SOC_SPECIFIC_OPTIONS - def_bool y select ACPI_SOC_NVS select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH @@ -88,6 +81,10 @@ config SOC_SPECIFIC_OPTIONS select VBOOT_DEFINE_WIDEVINE_COUNTERS if VBOOT_STARTS_BEFORE_BOOTBLOCK select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI + help + AMD Morgana support + +if SOC_AMD_MORGANA config CHIPSET_DEVICETREE string diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 765ac4c72f6f..b18868dcec2e 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -2,13 +2,6 @@ config SOC_AMD_PICASSO bool - help - AMD Picasso support - -if SOC_AMD_PICASSO - -config CPU_SPECIFIC_OPTIONS - def_bool y select ACPI_SOC_NVS select ADD_FSP_BINARIES if USE_AMD_BLOBS select ARCH_X86 @@ -76,6 +69,10 @@ config CPU_SPECIFIC_OPTIONS select X86_AMD_FIXED_MTRRS select X86_INIT_NEED_1_SIPI select HAVE_EXP_X86_64_SUPPORT + help + AMD Picasso support + +if SOC_AMD_PICASSO config CHIPSET_DEVICETREE string diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 01800c14145f..12d66c45a235 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -2,13 +2,6 @@ config SOC_AMD_STONEYRIDGE bool - help - AMD support for SOCs in Family 15h Models 60h-6Fh and Models 70h-7Fh. - -if SOC_AMD_STONEYRIDGE - -config CPU_SPECIFIC_OPTIONS - def_bool y select ACPI_SOC_NVS select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH @@ -51,6 +44,10 @@ config CPU_SPECIFIC_OPTIONS select TSC_SYNC_LFENCE select USE_DDR4 select X86_AMD_FIXED_MTRRS + help + AMD support for SOCs in Family 15h Models 60h-6Fh and Models 70h-7Fh. + +if SOC_AMD_STONEYRIDGE config AMD_APU_STONEYRIDGE bool |