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| author | Kapil Porwal <kapilporwal@google.com> | 2022-12-27 19:26:48 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-01-04 04:50:56 +0000 |
| commit | a2a9e8ea8fb58943a04ba1a5890010b20beb474e (patch) | |
| tree | fe7a8dec8b2f5871413d2fe581420274a9b9efc3 /src/soc | |
| parent | 08e8067a58177f65a5fa191a28aea5d52e37c541 (diff) | |
| download | coreboot-a2a9e8ea8fb58943a04ba1a5890010b20beb474e.tar.gz coreboot-a2a9e8ea8fb58943a04ba1a5890010b20beb474e.tar.bz2 coreboot-a2a9e8ea8fb58943a04ba1a5890010b20beb474e.zip | |
soc/intel/common/block/fast_spi: Hook up pci_dev_ops_pci to set SSID
BUG=none
TEST=Verify presence of subsystem ID for fast_spi device on google/rex.
lspci output before this patch:
00:1f.5 Serial bus controller [0c80]: Intel Corporation Device [8086:7e23]
lspci output after this patch:
00:1f.5 Serial bus controller [0c80]: Intel Corporation Device [8086:7e23]
Subsystem: Intel Corporation Device [8086:7e23]
Note: UPD SiSkipSsidProgramming was set to 1 for above test.
Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: I08c7a5a3fdc7389b315e85180c16d1ec335fbba2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71275
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index 471c85d88a15..a2c49915ea79 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -542,6 +542,7 @@ static struct device_operations fast_spi_dev_ops = { .enable_resources = pci_dev_enable_resources, .acpi_fill_ssdt = fast_spi_fill_ssdt, .acpi_name = fast_spi_acpi_name, + .ops_pci = &pci_dev_ops_pci, }; static const unsigned short pci_device_ids[] = { |