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| author | Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com> | 2022-12-19 10:13:09 -0800 |
|---|---|---|
| committer | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2023-01-02 03:55:04 +0000 |
| commit | e51978f26fde2f400979ad28f35d497ff3b8ad76 (patch) | |
| tree | 8104ac0b97fa246b165e43a444799eb3cb4e6dc9 /src/soc | |
| parent | 9693bcb4c4826c6f672f88a6777bc459cb0920da (diff) | |
| download | coreboot-e51978f26fde2f400979ad28f35d497ff3b8ad76.tar.gz coreboot-e51978f26fde2f400979ad28f35d497ff3b8ad76.tar.bz2 coreboot-e51978f26fde2f400979ad28f35d497ff3b8ad76.zip | |
soc/intel/common: Move SGX supported API to cpulib
Move is_sgx_supported() API to common cpulib code, so that
this function can be used by other code without enabling
SOC_INTEL_COMMON_BLOCK_SGX_ENABLE config option.
Change-Id: Ib630ac451152ae2471c862fced992dde3b49d05d
Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71116
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/block/cpu/cpulib.c | 10 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cpulib.h | 6 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/sgx.h | 5 | ||||
| -rw-r--r-- | src/soc/intel/common/block/sgx/sgx.c | 10 |
4 files changed, 16 insertions, 15 deletions
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index 5332d015658e..0e783447cff1 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -523,3 +523,13 @@ unsigned int smbios_cpu_get_max_speed_mhz(void) { return cpu_get_max_turbo_ratio() * CONFIG_CPU_BCLK_MHZ; } + +bool is_sgx_supported(void) +{ + struct cpuid_result cpuid_regs; + msr_t msr; + + cpuid_regs = cpuid_ext(0x7, 0x0); /* EBX[2] is feature capability */ + msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ + return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); +} diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index 7878bf420331..6c3aa56443aa 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -211,4 +211,10 @@ bool is_tme_supported(void); */ void set_tme_core_activate(void); +/* + * This function checks if the CPU supports SGX feature. + * Returns true if SGX feature is supported otherwise false. + */ +bool is_sgx_supported(void); + #endif /* SOC_INTEL_COMMON_BLOCK_CPULIB_H */ diff --git a/src/soc/intel/common/block/include/intelblocks/sgx.h b/src/soc/intel/common/block/include/intelblocks/sgx.h index 3099faffba63..ac056f7f6f91 100644 --- a/src/soc/intel/common/block/include/intelblocks/sgx.h +++ b/src/soc/intel/common/block/include/intelblocks/sgx.h @@ -6,11 +6,6 @@ #include <soc/nvs.h> /* - * Check if SGX is supported - */ -int is_sgx_supported(void); - -/* * Configure core PRMRR. * PRMRR needs to configured first on all cores and then * call sgx_configure() for all cores to init SGX. diff --git a/src/soc/intel/common/block/sgx/sgx.c b/src/soc/intel/common/block/sgx/sgx.c index 88fe174694a7..31447f9a761a 100644 --- a/src/soc/intel/common/block/sgx/sgx.c +++ b/src/soc/intel/common/block/sgx/sgx.c @@ -12,16 +12,6 @@ #include <soc/cpu.h> #include <soc/pci_devs.h> -int is_sgx_supported(void) -{ - struct cpuid_result cpuid_regs; - msr_t msr; - - cpuid_regs = cpuid_ext(0x7, 0x0); /* EBX[2] is feature capability */ - msr = rdmsr(MTRR_CAP_MSR); /* Bit 12 is PRMRR enablement */ - return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); -} - void prmrr_core_configure(void) { msr_t prmrr_base, prmrr_mask; |