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| author | Felix Held <felix-coreboot@felixheld.de> | 2022-02-23 16:35:58 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-25 17:42:20 +0000 |
| commit | 4e03727e63b1af7f5bdb9df42f40801052c6a11d (patch) | |
| tree | d90c8775bb2373884c8c64cde571c71481f65f64 /src/southbridge/intel/i82801gx/Kconfig | |
| parent | 7f8c737fe97487704f533ac48c7a03233d956869 (diff) | |
| download | coreboot-4e03727e63b1af7f5bdb9df42f40801052c6a11d.tar.gz coreboot-4e03727e63b1af7f5bdb9df42f40801052c6a11d.tar.bz2 coreboot-4e03727e63b1af7f5bdb9df42f40801052c6a11d.zip | |
arch/x86/Kconfig: add HPET_MIN_TICKS
Some Intel southbridges have HPET_MIN_TICKS in their Kconfig files, but
the CONFIG_HPET_MIN_TICKS symbol is used in the common acpi code in
acpi/acpi.c, so define this option in arch/x86/Kconfig to have it
defined in all cases where the function that ends up using this
information gets called. Since we now have the type information for this
Kconfig option in a central place, it can be dropped from the Kconfig
file of the Intel southbridges that change the default value.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ibe012069dd4b51c15a8fbc6459186ad2ea405a03
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62298
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801gx/Kconfig')
| -rw-r--r-- | src/southbridge/intel/i82801gx/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index 399d7e0bbb95..9e7259f121e3 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -30,7 +30,6 @@ config EHCI_BAR default 0xfef00000 config HPET_MIN_TICKS - hex default 0x80 config INTEL_TOP_SWAP_BOOTBLOCK_SIZE |