summaryrefslogtreecommitdiffstats
path: root/src/southbridge
diff options
context:
space:
mode:
authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2011-04-11 20:17:22 +0000
committerStefan Reinauer <stepan@openbios.org>2011-04-11 20:17:22 +0000
commit5005bb06c17461ef75cd1fef55c24dffaa05e580 (patch)
tree2c38986a89152225ad56cb44227f5bc6ddbecd06 /src/southbridge
parent1fa61ebb3344105ae633ed7eb1be05cc574b666c (diff)
downloadcoreboot-5005bb06c17461ef75cd1fef55c24dffaa05e580.tar.gz
coreboot-5005bb06c17461ef75cd1fef55c24dffaa05e580.tar.bz2
coreboot-5005bb06c17461ef75cd1fef55c24dffaa05e580.zip
Unify use of post_code
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6487 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge')
-rw-r--r--src/southbridge/amd/cs5535/chipsetinit.c3
-rw-r--r--src/southbridge/amd/cs5536/cs5536.c1
-rw-r--r--src/southbridge/via/vt8231/early_serial.c7
3 files changed, 5 insertions, 6 deletions
diff --git a/src/southbridge/amd/cs5535/chipsetinit.c b/src/southbridge/amd/cs5535/chipsetinit.c
index 0e37fcc7efd2..2fceefa5ebd7 100644
--- a/src/southbridge/amd/cs5535/chipsetinit.c
+++ b/src/southbridge/amd/cs5535/chipsetinit.c
@@ -10,7 +10,6 @@
#include "chip.h"
#include "northbridge/amd/gx2/northbridge.h"
#include <cpu/amd/gx2def.h>
-#include <cpu/amd/geode_post_code.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/cache.h>
#include "southbridge/amd/cs5535/cs5535.h"
@@ -277,7 +276,7 @@ chipsetinit(void)
return;
}
- outb( P80_CHIPSET_INIT, 0x80);
+ post_code(P80_CHIPSET_INIT);
ChipsetGeodeLinkInit();
#ifdef UNUSED_CODE
diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c
index a2ac44647f4b..872de36887ea 100644
--- a/src/southbridge/amd/cs5536/cs5536.c
+++ b/src/southbridge/amd/cs5536/cs5536.c
@@ -30,7 +30,6 @@
#include <pc80/i8259.h>
#include <cpu/x86/msr.h>
#include <cpu/amd/vr.h>
-#include <cpu/amd/geode_post_code.h>
#include <stdlib.h>
#include "chip.h"
#include "cs5536.h"
diff --git a/src/southbridge/via/vt8231/early_serial.c b/src/southbridge/via/vt8231/early_serial.c
index af5a7729eef2..a0aec65f54d1 100644
--- a/src/southbridge/via/vt8231/early_serial.c
+++ b/src/southbridge/via/vt8231/early_serial.c
@@ -1,3 +1,4 @@
+#include <console/console.h>
/*
* Enable the serial evices on the VIA
*/
@@ -33,11 +34,11 @@ static void enable_vt8231_serial(void)
{
uint8_t c;
device_t dev;
- outb(6, 0x80);
+ post_code(0x06);
dev = pci_locate_device(PCI_ID(0x1106,0x8231), 0);
if (dev == PCI_DEV_INVALID) {
- outb(7, 0x80);
+ post_code(0x07);
die("Serial controller not found\n");
}
@@ -47,7 +48,7 @@ static void enable_vt8231_serial(void)
c = pci_read_config8(dev, 0x50);
c |= 6;
pci_write_config8(dev, 0x50, c);
- outb(2, 0x80);
+ post_code(0x02);
// now go ahead and set up com1.
// set address
vt8231_writesuper(0xf4, 0xfe);