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| author | Arthur Heymans <arthur@aheymans.xyz> | 2016-12-27 01:08:02 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-01-05 17:45:18 +0100 |
| commit | d502dc092a26726472fc5871c77ebff192be4cb8 (patch) | |
| tree | 43eb3507b0ab3ae66bbc88260c2337d56599d640 /src/southbridge | |
| parent | ab8f7d315ec845d0fe86b440b4773d22f97946cd (diff) | |
| download | coreboot-d502dc092a26726472fc5871c77ebff192be4cb8.tar.gz coreboot-d502dc092a26726472fc5871c77ebff192be4cb8.tar.bz2 coreboot-d502dc092a26726472fc5871c77ebff192be4cb8.zip | |
mb/ga-m57sli-s4: Fix early uart output
The console output is garbled until it is fixed in ramstage
by devicetree which sets the uart clock predivider correctly.
Change-Id: I6d6ec0febfec98a8d4a71e1476036c804cf5f08d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/17969
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge')
0 files changed, 0 insertions, 0 deletions