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author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-08-27 14:54:24 -0700 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-08-28 14:17:10 +0000 |
commit | 90b3149deb60638fa570920e2862e03a07502ecb (patch) | |
tree | c22843c87ecce138610fcf960e03fdf47c5380de /src/vendorcode/amd | |
parent | 328ff7dee02e74d0d4e4107fd58810d0228203b8 (diff) | |
download | coreboot-90b3149deb60638fa570920e2862e03a07502ecb.tar.gz coreboot-90b3149deb60638fa570920e2862e03a07502ecb.tar.bz2 coreboot-90b3149deb60638fa570920e2862e03a07502ecb.zip |
vendorcode/amd/pi/00670F00: Transfer TP_Perf_STRUCT to AGESA.h
Google is creating code to measure AGESA performance, which needs structure
TP_Perf_STRUCT and associated definitions. In preparation to remove IDS
headers, move the necessary definitions to AGESA.h.
BUG=b:112885948
TEST=Build grunt
Change-Id: I941a67a8889a9dbf35c9fd511c7f670623204134
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/28369
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/vendorcode/amd')
-rw-r--r-- | src/vendorcode/amd/pi/00670F00/AGESA.h | 119 | ||||
-rw-r--r-- | src/vendorcode/amd/pi/00670F00/Include/IdsPerf.h | 101 | ||||
-rw-r--r-- | src/vendorcode/amd/pi/00670F00/Proc/IDS/IdsLib.h | 18 |
3 files changed, 119 insertions, 119 deletions
diff --git a/src/vendorcode/amd/pi/00670F00/AGESA.h b/src/vendorcode/amd/pi/00670F00/AGESA.h index 2eee41bc9066..fbe93bdcda49 100644 --- a/src/vendorcode/amd/pi/00670F00/AGESA.h +++ b/src/vendorcode/amd/pi/00670F00/AGESA.h @@ -3581,6 +3581,125 @@ typedef enum { #ifndef IDS_CALLOUT_INIT #define IDS_CALLOUT_INIT 0x01 ///< The function data of IDS callout function of initialization. + +#define IDS_PERF_VERSION 0x00010001ul //version number 0.1.0.1 +/// Time points performance function used +/// N O T E: NEVER change below defination, any new TP MUST be appended to the end of this enum + typedef enum { + TP_BEGINPROCAMDINITEARLY = 0x100, ///< BeginProcAmdInitEarly + TP_ENDPROCAMDINITEARLY = 0x101, ///< EndProcAmdInitEarly + TP_BEGINAMDTOPOINITIALIZE = 0x102, ///< BeginAmdTopoInitialize + TP_ENDAMDTOPOINITIALIZE = 0x103, ///< EndAmdTopoInitialize + TP_BEGINGNBINITATEARLIER = 0x104, ///< BeginGnbInitAtEarlier + TP_ENDGNBINITATEARLIER = 0x105, ///< EndGnbInitAtEarlier + TP_BEGINAMDCPUEARLY = 0x106, ///< BeginAmdCpuEarly + TP_ENDAMDCPUEARLY = 0x107, ///< EndAmdCpuEarly + TP_BEGINGNBINITATEARLY = 0x108, ///< BeginGnbInitAtEarly + TP_ENDGNBINITATEARLY = 0x109, ///< EndGnbInitAtEarly + TP_BEGINPROCAMDINITENV = 0x10A, ///< BeginProcAmdInitEnv + TP_ENDPROCAMDINITENV = 0x10B, ///< EndProcAmdInitEnv + TP_BEGININITENV = 0x10C, ///< BeginInitEnv + TP_ENDINITENV = 0x10D, ///< EndInitEnv + TP_BEGINGNBINITATENV = 0x10E, ///< BeginGnbInitAtEnv + TP_ENDGNBINITATENV = 0x10F, ///< EndGnbInitAtEnv + TP_BEGINPROCAMDINITLATE = 0x110, ///< BeginProcAmdInitLate + TP_ENDPROCAMDINITLATE = 0x111, ///< EndProcAmdInitLate + TP_BEGINCREATSYSTEMTABLE = 0x112, ///< BeginCreatSystemTable + TP_ENDCREATSYSTEMTABLE = 0x113, ///< EndCreatSystemTable + TP_BEGINDISPATCHCPUFEATURESLATE = 0x114, ///< BeginDispatchCpuFeaturesLate + TP_ENDDISPATCHCPUFEATURESLATE = 0x115, ///< EndDispatchCpuFeaturesLate + TP_BEGINAMDCPULATE = 0x116, ///< BeginAmdCpuLate + TP_ENDAMDCPULATE = 0x117, ///< EndAmdCpuLate + TP_BEGINGNBINITATLATE = 0x118, ///< BeginGnbInitAtLate + TP_ENDGNBINITATLATE = 0x119, ///< EndGnbInitAtLate + TP_BEGINPROCAMDINITMID = 0x11A, ///< BeginProcAmdInitMid + TP_ENDPROCAMDINITMID = 0x11B, ///< EndProcAmdInitMid + TP_BEGININITMID = 0x11E, ///< BeginInitMid + TP_ENDINITMID = 0x11F, ///< EndInitMid + TP_BEGINGNBINITATMID = 0x120, ///< BeginGnbInitAtMid + TP_ENDGNBINITATMID = 0x121, ///< EndGnbInitAtMid + TP_BEGINPROCAMDINITPOST = 0x122, ///< BeginProcAmdInitPost + TP_ENDPROCAMDINITPOST = 0x123, ///< EndProcAmdInitPost + TP_BEGINGNBINITATPOST = 0x124, ///< BeginGnbInitAtPost + TP_ENDGNBINITATPOST = 0x125, ///< EndGnbInitAtPost + TP_BEGINAMDMEMAUTO = 0x126, ///< BeginAmdMemAuto + TP_ENDAMDMEMAUTO = 0x127, ///< EndAmdMemAuto + TP_BEGINAMDCPUPOST = 0x128, ///< BeginAmdCpuPost + TP_ENDAMDCPUPOST = 0x129, ///< EndAmdCpuPost + TP_BEGINGNBINITATPOSTAFTERDRAM = 0x12A, ///< BeginGnbInitAtPostAfterDram + TP_ENDGNBINITATPOSTAFTERDRAM = 0x12B, ///< EndGnbInitAtPostAfterDram + TP_BEGINPROCAMDINITRESET = 0x12C, ///< BeginProcAmdInitReset + TP_ENDPROCAMDINITRESET = 0x12D, ///< EndProcAmdInitReset + TP_BEGININITRESET = 0x12E, ///< BeginInitReset + TP_ENDINITRESET = 0x12F, ///< EndInitReset + TP_BEGINHTINITRESET = 0x130, ///< BeginHtInitReset + TP_ENDHTINITRESET = 0x131, ///< EndHtInitReset + TP_BEGINPROCAMDINITRESUME = 0x132, ///< BeginProcAmdInitResume + TP_ENDPROCAMDINITRESUME = 0x133, ///< EndProcAmdInitResume + TP_BEGINAMDMEMS3RESUME = 0x134, ///< BeginAmdMemS3Resume + TP_ENDAMDMEMS3RESUME = 0x135, ///< EndAmdMemS3Resume + TP_BEGINDISPATCHCPUFEATURESS3RESUME = 0x136, ///< BeginDispatchCpuFeaturesS3Resume + TP_ENDDISPATCHCPUFEATURESS3RESUME = 0x137, ///< EndDispatchCpuFeaturesS3Resume + TP_BEGINSETCORESTSCFREQSEL = 0x138, ///< BeginSetCoresTscFreqSel + TP_ENDSETCORESTSCFREQSEL = 0x139, ///< EndSetCoresTscFreqSel + TP_BEGINMEMFMCTMEMCLR_INIT = 0x13A, ///< BeginMemFMctMemClr_Init + TP_ENDNMEMFMCTMEMCLR_INIT = 0x13B, ///< EndnMemFMctMemClr_Init + TP_BEGINMEMBEFOREMEMDATAINIT = 0x13C, ///< BeginMemBeforeMemDataInit + TP_ENDMEMBEFOREMEMDATAINIT = 0x13D, ///< EndMemBeforeMemDataInit + TP_BEGINPROCAMDMEMAUTO = 0x13E, ///< BeginProcAmdMemAuto + TP_ENDPROCAMDMEMAUTO = 0x13F, ///< EndProcAmdMemAuto + TP_BEGINMEMMFLOWC32 = 0x140, ///< BeginMemMFlowC32 + TP_ENDMEMMFLOWC32 = 0x141, ///< EndMemMFlowC32 + TP_BEGINMEMINITIALIZEMCT = 0x142, ///< BeginMemInitializeMCT + TP_ENDMEMINITIALIZEMCT = 0x143, ///< EndMemInitializeMCT + TP_BEGINMEMSYSTEMMEMORYMAPPING = 0x144, ///< BeginMemSystemMemoryMapping + TP_ENDMEMSYSTEMMEMORYMAPPING = 0x145, ///< EndMemSystemMemoryMapping + TP_BEGINMEMDRAMTRAINING = 0x146, ///< BeginMemDramTraining + TP_ENDMEMDRAMTRAINING = 0x147, ///< EndMemDramTraining + TP_BEGINMEMOTHERTIMING = 0x148, ///< BeginMemOtherTiming + TP_ENDMEMOTHERTIMING = 0x149, ///< EndMemOtherTiming + TP_BEGINMEMUMAMEMTYPING = 0x14A, ///< BeginMemUMAMemTyping + TP_ENDMEMUMAMEMTYPING = 0x14B, ///< EndMemUMAMemTyping + TP_BEGINMEMMEMCLR = 0x14C, ///< BeginMemMemClr + TP_ENDMEMMEMCLR = 0x14D, ///< EndMemMemClr + TP_BEGINMEMMFLOWTN = 0x14E, ///< BeginMemMFlowTN + TP_ENDMEMMFLOWTN = 0x14F, ///< EndMemMFlowTN + TP_BEGINAGESAHOOKBEFOREDRAMINIT = 0x150, ///< BeginAgesaHookBeforeDramInit + TP_ENDAGESAHOOKBEFOREDRAMINIT = 0x151, ///< EndAgesaHookBeforeDramInit + TP_BEGINPROCMEMDRAMTRAINING = 0x152, ///< BeginProcMemDramTraining + TP_ENDPROCMEMDRAMTRAINING = 0x153, ///< EndProcMemDramTraining + TP_BEGINGNBINITATRTB = 0x154, ///< BeginGnbInitAtRtb + TP_ENDGNBINITATRTB = 0x155, ///< EndGnbInitAtRtb + TP_BEGINGNBLOADSCSDATA = 0x156, ///< BeginGnbLoadScsData + TP_ENDGNBLOADSCSDATA = 0x157, ///< EndGnbLoadScsData + TP_BEGINGNBPCIETRAINING = 0x158, ///< BeginGnbPcieTraining + TP_ENDGNBPCIETRAINING = 0x159, ///< EndGnbPcieTraining + TP_BEGINDISPATCHCPUFEATURESINITRTB = 0x15A, ///< BeginDispatchCpuFeaturesInitRtb + TP_ENDDISPATCHCPUFEATURESINITRTB = 0x15B, ///< EndDispatchCpuFeaturesInitRtb + TP_BEGINAMDCPUMID = 0x15C, ///< BeginAmdCpuEarly + TP_ENDAMDCPUMID = 0x15D, ///< EndAmdCpuEarly + TP_BEGINAMDGNBMIDLATE = 0x15E, ///< BeginAmdGnbMidLate + TP_ENDAMDAMDGNBMIDLATE = 0x15F, ///< EndAmdGnbMidLate + IDS_TP_END ///< End of IDS TP list + } IDS_PERF_DATA; + +/// Data Structure of Parameters for TestPoint_TSC. +typedef struct { + UINT32 LineInFile; ///< Line of current time counter + UINT64 Description; ///<Description ID + UINT64 StartTsc; ///< The StartTimer of TestPoint_TSC +} TestPoint_TSC; + +#define RESERVED_TP_NUMER 0x20 +#define MAX_PERFORMANCE_UNIT_NUM (IDS_TP_END - TP_BEGINPROCAMDINITEARLY + 1 + RESERVED_TP_NUMER) +/// Data Structure of Parameters for TP_Perf_STRUCT. +typedef struct { + UINT32 Signature; ///< "PERF" + UINT32 Version; ///< version + UINT32 Index; ///< The Index of TP_Perf_STRUCT + UINT32 TscInMhz; ///< Tsc counter in 1 mhz + TestPoint_TSC TP[MAX_PERFORMANCE_UNIT_NUM]; ///< The TP of TP_Perf_STRUCT +} TP_Perf_STRUCT; #endif /************************************************************************ diff --git a/src/vendorcode/amd/pi/00670F00/Include/IdsPerf.h b/src/vendorcode/amd/pi/00670F00/Include/IdsPerf.h index 40feef605e10..edb48ac3f407 100644 --- a/src/vendorcode/amd/pi/00670F00/Include/IdsPerf.h +++ b/src/vendorcode/amd/pi/00670F00/Include/IdsPerf.h @@ -43,106 +43,5 @@ #include <check_for_wrapper.h> #ifndef _IDS_PERFORMANCE_DATA_POINT - #define _IDS_PERFORMANCE_DATA_POINT - #define IDS_PERF_VERSION 0x00010001ul //version number 0.1.0.1 -/// Time points performance function used -/// N O T E: NEVER change below defination, any new TP MUST be appended to the end of this enum - typedef enum { - TP_BEGINPROCAMDINITEARLY = 0x100, ///< BeginProcAmdInitEarly - TP_ENDPROCAMDINITEARLY = 0x101, ///< EndProcAmdInitEarly - TP_BEGINAMDTOPOINITIALIZE = 0x102, ///< BeginAmdTopoInitialize - TP_ENDAMDTOPOINITIALIZE = 0x103, ///< EndAmdTopoInitialize - TP_BEGINGNBINITATEARLIER = 0x104, ///< BeginGnbInitAtEarlier - TP_ENDGNBINITATEARLIER = 0x105, ///< EndGnbInitAtEarlier - TP_BEGINAMDCPUEARLY = 0x106, ///< BeginAmdCpuEarly - TP_ENDAMDCPUEARLY = 0x107, ///< EndAmdCpuEarly - TP_BEGINGNBINITATEARLY = 0x108, ///< BeginGnbInitAtEarly - TP_ENDGNBINITATEARLY = 0x109, ///< EndGnbInitAtEarly - TP_BEGINPROCAMDINITENV = 0x10A, ///< BeginProcAmdInitEnv - TP_ENDPROCAMDINITENV = 0x10B, ///< EndProcAmdInitEnv - TP_BEGININITENV = 0x10C, ///< BeginInitEnv - TP_ENDINITENV = 0x10D, ///< EndInitEnv - TP_BEGINGNBINITATENV = 0x10E, ///< BeginGnbInitAtEnv - TP_ENDGNBINITATENV = 0x10F, ///< EndGnbInitAtEnv - TP_BEGINPROCAMDINITLATE = 0x110, ///< BeginProcAmdInitLate - TP_ENDPROCAMDINITLATE = 0x111, ///< EndProcAmdInitLate - TP_BEGINCREATSYSTEMTABLE = 0x112, ///< BeginCreatSystemTable - TP_ENDCREATSYSTEMTABLE = 0x113, ///< EndCreatSystemTable - TP_BEGINDISPATCHCPUFEATURESLATE = 0x114, ///< BeginDispatchCpuFeaturesLate - TP_ENDDISPATCHCPUFEATURESLATE = 0x115, ///< EndDispatchCpuFeaturesLate - TP_BEGINAMDCPULATE = 0x116, ///< BeginAmdCpuLate - TP_ENDAMDCPULATE = 0x117, ///< EndAmdCpuLate - TP_BEGINGNBINITATLATE = 0x118, ///< BeginGnbInitAtLate - TP_ENDGNBINITATLATE = 0x119, ///< EndGnbInitAtLate - TP_BEGINPROCAMDINITMID = 0x11A, ///< BeginProcAmdInitMid - TP_ENDPROCAMDINITMID = 0x11B, ///< EndProcAmdInitMid - TP_BEGININITMID = 0x11E, ///< BeginInitMid - TP_ENDINITMID = 0x11F, ///< EndInitMid - TP_BEGINGNBINITATMID = 0x120, ///< BeginGnbInitAtMid - TP_ENDGNBINITATMID = 0x121, ///< EndGnbInitAtMid - TP_BEGINPROCAMDINITPOST = 0x122, ///< BeginProcAmdInitPost - TP_ENDPROCAMDINITPOST = 0x123, ///< EndProcAmdInitPost - TP_BEGINGNBINITATPOST = 0x124, ///< BeginGnbInitAtPost - TP_ENDGNBINITATPOST = 0x125, ///< EndGnbInitAtPost - TP_BEGINAMDMEMAUTO = 0x126, ///< BeginAmdMemAuto - TP_ENDAMDMEMAUTO = 0x127, ///< EndAmdMemAuto - TP_BEGINAMDCPUPOST = 0x128, ///< BeginAmdCpuPost - TP_ENDAMDCPUPOST = 0x129, ///< EndAmdCpuPost - TP_BEGINGNBINITATPOSTAFTERDRAM = 0x12A, ///< BeginGnbInitAtPostAfterDram - TP_ENDGNBINITATPOSTAFTERDRAM = 0x12B, ///< EndGnbInitAtPostAfterDram - TP_BEGINPROCAMDINITRESET = 0x12C, ///< BeginProcAmdInitReset - TP_ENDPROCAMDINITRESET = 0x12D, ///< EndProcAmdInitReset - TP_BEGININITRESET = 0x12E, ///< BeginInitReset - TP_ENDINITRESET = 0x12F, ///< EndInitReset - TP_BEGINHTINITRESET = 0x130, ///< BeginHtInitReset - TP_ENDHTINITRESET = 0x131, ///< EndHtInitReset - TP_BEGINPROCAMDINITRESUME = 0x132, ///< BeginProcAmdInitResume - TP_ENDPROCAMDINITRESUME = 0x133, ///< EndProcAmdInitResume - TP_BEGINAMDMEMS3RESUME = 0x134, ///< BeginAmdMemS3Resume - TP_ENDAMDMEMS3RESUME = 0x135, ///< EndAmdMemS3Resume - TP_BEGINDISPATCHCPUFEATURESS3RESUME = 0x136, ///< BeginDispatchCpuFeaturesS3Resume - TP_ENDDISPATCHCPUFEATURESS3RESUME = 0x137, ///< EndDispatchCpuFeaturesS3Resume - TP_BEGINSETCORESTSCFREQSEL = 0x138, ///< BeginSetCoresTscFreqSel - TP_ENDSETCORESTSCFREQSEL = 0x139, ///< EndSetCoresTscFreqSel - TP_BEGINMEMFMCTMEMCLR_INIT = 0x13A, ///< BeginMemFMctMemClr_Init - TP_ENDNMEMFMCTMEMCLR_INIT = 0x13B, ///< EndnMemFMctMemClr_Init - TP_BEGINMEMBEFOREMEMDATAINIT = 0x13C, ///< BeginMemBeforeMemDataInit - TP_ENDMEMBEFOREMEMDATAINIT = 0x13D, ///< EndMemBeforeMemDataInit - TP_BEGINPROCAMDMEMAUTO = 0x13E, ///< BeginProcAmdMemAuto - TP_ENDPROCAMDMEMAUTO = 0x13F, ///< EndProcAmdMemAuto - TP_BEGINMEMMFLOWC32 = 0x140, ///< BeginMemMFlowC32 - TP_ENDMEMMFLOWC32 = 0x141, ///< EndMemMFlowC32 - TP_BEGINMEMINITIALIZEMCT = 0x142, ///< BeginMemInitializeMCT - TP_ENDMEMINITIALIZEMCT = 0x143, ///< EndMemInitializeMCT - TP_BEGINMEMSYSTEMMEMORYMAPPING = 0x144, ///< BeginMemSystemMemoryMapping - TP_ENDMEMSYSTEMMEMORYMAPPING = 0x145, ///< EndMemSystemMemoryMapping - TP_BEGINMEMDRAMTRAINING = 0x146, ///< BeginMemDramTraining - TP_ENDMEMDRAMTRAINING = 0x147, ///< EndMemDramTraining - TP_BEGINMEMOTHERTIMING = 0x148, ///< BeginMemOtherTiming - TP_ENDMEMOTHERTIMING = 0x149, ///< EndMemOtherTiming - TP_BEGINMEMUMAMEMTYPING = 0x14A, ///< BeginMemUMAMemTyping - TP_ENDMEMUMAMEMTYPING = 0x14B, ///< EndMemUMAMemTyping - TP_BEGINMEMMEMCLR = 0x14C, ///< BeginMemMemClr - TP_ENDMEMMEMCLR = 0x14D, ///< EndMemMemClr - TP_BEGINMEMMFLOWTN = 0x14E, ///< BeginMemMFlowTN - TP_ENDMEMMFLOWTN = 0x14F, ///< EndMemMFlowTN - TP_BEGINAGESAHOOKBEFOREDRAMINIT = 0x150, ///< BeginAgesaHookBeforeDramInit - TP_ENDAGESAHOOKBEFOREDRAMINIT = 0x151, ///< EndAgesaHookBeforeDramInit - TP_BEGINPROCMEMDRAMTRAINING = 0x152, ///< BeginProcMemDramTraining - TP_ENDPROCMEMDRAMTRAINING = 0x153, ///< EndProcMemDramTraining - TP_BEGINGNBINITATRTB = 0x154, ///< BeginGnbInitAtRtb - TP_ENDGNBINITATRTB = 0x155, ///< EndGnbInitAtRtb - TP_BEGINGNBLOADSCSDATA = 0x156, ///< BeginGnbLoadScsData - TP_ENDGNBLOADSCSDATA = 0x157, ///< EndGnbLoadScsData - TP_BEGINGNBPCIETRAINING = 0x158, ///< BeginGnbPcieTraining - TP_ENDGNBPCIETRAINING = 0x159, ///< EndGnbPcieTraining - TP_BEGINDISPATCHCPUFEATURESINITRTB = 0x15A, ///< BeginDispatchCpuFeaturesInitRtb - TP_ENDDISPATCHCPUFEATURESINITRTB = 0x15B, ///< EndDispatchCpuFeaturesInitRtb - TP_BEGINAMDCPUMID = 0x15C, ///< BeginAmdCpuEarly - TP_ENDAMDCPUMID = 0x15D, ///< EndAmdCpuEarly - TP_BEGINAMDGNBMIDLATE = 0x15E, ///< BeginAmdGnbMidLate - TP_ENDAMDAMDGNBMIDLATE = 0x15F, ///< EndAmdGnbMidLate - IDS_TP_END ///< End of IDS TP list - } IDS_PERF_DATA; #endif diff --git a/src/vendorcode/amd/pi/00670F00/Proc/IDS/IdsLib.h b/src/vendorcode/amd/pi/00670F00/Proc/IDS/IdsLib.h index d53878f392b8..167ac6fc7ff4 100644 --- a/src/vendorcode/amd/pi/00670F00/Proc/IDS/IdsLib.h +++ b/src/vendorcode/amd/pi/00670F00/Proc/IDS/IdsLib.h @@ -45,22 +45,4 @@ #ifndef _IDS_LIB_H_ #define _IDS_LIB_H_ -/// Data Structure of Parameters for TestPoint_TSC. -typedef struct { - UINT32 LineInFile; ///< Line of current time counter - UINT64 Description; ///<Description ID - UINT64 StartTsc; ///< The StartTimer of TestPoint_TSC -} TestPoint_TSC; - -#define RESERVED_TP_NUMER 0x20 -#define MAX_PERFORMANCE_UNIT_NUM (IDS_TP_END - TP_BEGINPROCAMDINITEARLY + 1 + RESERVED_TP_NUMER) -/// Data Structure of Parameters for TP_Perf_STRUCT. -typedef struct { - UINT32 Signature; ///< "PERF" - UINT32 Version; ///< version - UINT32 Index; ///< The Index of TP_Perf_STRUCT - UINT32 TscInMhz; ///< Tsc counter in 1 mhz - TestPoint_TSC TP[MAX_PERFORMANCE_UNIT_NUM]; ///< The TP of TP_Perf_STRUCT -} TP_Perf_STRUCT; - #endif //_IDS_LIB_H_ |