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| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2021-09-10 11:36:21 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-27 13:29:37 +0000 |
| commit | b3ffff87dd1e01eb20240279f5d88707475c1428 (patch) | |
| tree | 83a335c4b97a8b3d44c75ef9f510aed9a729a958 /src/vendorcode | |
| parent | 401238873615141627cd06d61b57d63198619af2 (diff) | |
| download | coreboot-b3ffff87dd1e01eb20240279f5d88707475c1428.tar.gz coreboot-b3ffff87dd1e01eb20240279f5d88707475c1428.tar.bz2 coreboot-b3ffff87dd1e01eb20240279f5d88707475c1428.zip | |
soc/amd/cezanne, vc/amd/fsp/*: Add support for CCP DMA SVC call
Add support to access the boot device from PSP through Crypto
Co-Processor (CCP) DMA. Implement a SVC call to use CCP DMA on SoCs
where it is supported and a stub on SoCs where it is not supported. This
provides an improved performance while accessing the boot device and
reduces the boot time by ~45 ms.
BUG=b:194990811
TEST=Build and boot to OS in guybrush. Perform cold and warm reboot
cycling for 250 iterations.
Change-Id: I02b94a842190ac4dcf45ff2d846b8665f06a9c75
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57562
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/vendorcode')
| -rw-r--r-- | src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h | 13 | ||||
| -rw-r--r-- | src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_syscall_public.h | 16 |
2 files changed, 29 insertions, 0 deletions
diff --git a/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h index 61c9e5f0a8c0..06e9defea775 100644 --- a/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h +++ b/src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h @@ -49,6 +49,7 @@ #define SVC_RESET_SYSTEM 0x67 #define SVC_READ_TIMER_VAL 0x68 #define SVC_SHA 0x69 +#define SVC_CCP_DMA 0x6A struct mod_exp_params { char *pExponent; // Exponent address @@ -300,6 +301,18 @@ uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode */ uint32_t svc_modexp(struct mod_exp_params *mod_exp_param); +/* + * Copies the data from source to destination using ccp + * + * Parameters: + * Source Address - SPI ROM offset + * Destination Address - Address in Verstage memory + * Size - Total size to copy + * + * Return value: BL_OK or error code + */ +uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size); + /* C entry point for the Bootloader Userspace Application */ void Main(void); diff --git a/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_syscall_public.h b/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_syscall_public.h index c05729518566..0c168a93b2fc 100644 --- a/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_syscall_public.h +++ b/src/vendorcode/amd/fsp/picasso/include/bl_uapp/bl_syscall_public.h @@ -30,6 +30,7 @@ #ifndef _BL_SYSCALL_PUBLIC_H_ #define _BL_SYSCALL_PUBLIC_H_ +#include <bl_uapp/bl_errorcodes_public.h> #include <stdint.h> #define SVC_EXIT 0x00 @@ -394,6 +395,21 @@ uint32_t svc_rsa_pkcs_verify(const struct rsapkcs_verify_params *params); */ uint32_t svc_modexp(struct mod_exp_params *mod_exp_param); +/* + * Copies the data from source to destination using ccp + * + * Parameters: + * Source Address - SPI ROM offset + * Destination Address - Address in Verstage memory + * Size - Total size to copy + * + * Return value: BL_OK or error code + */ +static inline uint32_t svc_ccp_dma(uint32_t spi_rom_offset, void *dest, uint32_t size) +{ + return BL_ERR_UNSUPPORTED_PLATFORM; +} + /* C entry point for the Bootloader Userspace Application */ void Main(void); |