diff options
| author | Varshit Pandya <pandyavarshit@gmail.com> | 2023-10-16 17:26:35 +0530 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-10-20 14:28:48 +0000 |
| commit | 0a2d2a974466245b6429daafbb08ddb2e77406aa (patch) | |
| tree | 7c9a43cb76f6d51125c9b7c0806904ed4bf61ac1 /src | |
| parent | 49bbe34829523bfa6c8eb5eb5b6429538efe3fff (diff) | |
| download | coreboot-0a2d2a974466245b6429daafbb08ddb2e77406aa.tar.gz coreboot-0a2d2a974466245b6429daafbb08ddb2e77406aa.tar.bz2 coreboot-0a2d2a974466245b6429daafbb08ddb2e77406aa.zip | |
soc/amd/genoa: Add SMU header file and SMU Kconfig
Change-Id: Ief56bff2a1b8825d6e65aeb5f7ed9e8f432e465b
Signed-off-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78390
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/genoa/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/amd/genoa/include/soc/smu.h | 23 |
2 files changed, 25 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/Kconfig b/src/soc/amd/genoa/Kconfig index fc4bf57d6180..a371d218db96 100644 --- a/src/soc/amd/genoa/Kconfig +++ b/src/soc/amd/genoa/Kconfig @@ -18,6 +18,8 @@ config SOC_SPECIFIC_OPTIONS select SOC_AMD_COMMON_BLOCK_NONCAR select SOC_AMD_COMMON_BLOCK_PCI_MMCONF select SOC_AMD_COMMON_BLOCK_SMI + select SOC_AMD_COMMON_BLOCK_SMU + select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY select SOC_AMD_COMMON_BLOCK_TSC select SOC_AMD_COMMON_BLOCK_UART select SOC_AMD_COMMON_BLOCK_USE_ESPI diff --git a/src/soc/amd/genoa/include/soc/smu.h b/src/soc/amd/genoa/include/soc/smu.h new file mode 100644 index 000000000000..6ab0c063e578 --- /dev/null +++ b/src/soc/amd/genoa/include/soc/smu.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef AMD_GENOA_SMU_H +#define AMD_GENOA_SMU_H + +/* SMU mailbox register offsets in SMN */ +#define SMN_SMU_MESG_ID 0x3b10530 +#define SMN_SMU_MESG_RESP 0x3b1057c +#define SMN_SMU_MESG_ARGS_BASE 0x3b109c4 + +#define SMU_NUM_ARGS 6 + +enum smu_message_id { + SMC_MSG_S3ENTRY = 0x0b, +}; + +/* + * Request the SMU put system into S3, S4, or S5. On entry, SlpTyp determines S-State and + * SlpTypeEn gets set by the SMU. Function does not return if successful. + */ +void smu_sx_entry(void); + +#endif /* AMD_GENOA_SMU_H */ |