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| author | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-02-28 20:56:42 +0000 |
|---|---|---|
| committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2010-02-28 20:56:42 +0000 |
| commit | 806a29eb1909cc4df0fb4bdb0f25083976c3ea6c (patch) | |
| tree | a3815e1e38d78f5f81a582ba64d9a47fab4a17b5 /src | |
| parent | 43fed9b4ed2fe831ed8c65e28e7593d2fa4902f0 (diff) | |
| download | coreboot-806a29eb1909cc4df0fb4bdb0f25083976c3ea6c.tar.gz coreboot-806a29eb1909cc4df0fb4bdb0f25083976c3ea6c.tar.bz2 coreboot-806a29eb1909cc4df0fb4bdb0f25083976c3ea6c.zip | |
Use the romstraps build infrastructure created for "tinybootblock"
(chipset_bootblock_inc and chipset_bootblock_lds) instead of using
chipset specific rules for "bigbootblock" in the generic i386 Makefile.
It also adds rules for the romstraps of
* southbridge/nvidia/ck804
* southbridge/sis/sis966
* northbridge/via/vx800
for the benefit of both image layouts.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5175 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
| -rw-r--r-- | src/arch/i386/Makefile.inc | 18 | ||||
| -rw-r--r-- | src/northbridge/via/vx800/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/southbridge/nvidia/ck804/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/southbridge/sis/sis966/Makefile.inc | 3 |
4 files changed, 10 insertions, 16 deletions
diff --git a/src/arch/i386/Makefile.inc b/src/arch/i386/Makefile.inc index 5e6e194a9ee2..22318956f34d 100644 --- a/src/arch/i386/Makefile.inc +++ b/src/arch/i386/Makefile.inc @@ -154,22 +154,8 @@ ldscripts += $(src)/arch/i386/init/ldscript_apc.lb endif ifeq ($(CONFIG_BIG_BOOTBLOCK),y) -ifeq ($(CONFIG_SOUTHBRIDGE_NVIDIA_CK804),y) -crt0s += $(src)/southbridge/nvidia/ck804/romstrap.inc -ldscripts += $(src)/southbridge/nvidia/ck804/romstrap.lds -endif -ifeq ($(CONFIG_SOUTHBRIDGE_NVIDIA_MCP55),y) -crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc -ldscripts += $(src)/southbridge/nvidia/mcp55/romstrap.lds -endif -ifeq ($(CONFIG_SOUTHBRIDGE_VIA_K8T890),y) -crt0s += $(src)/southbridge/via/k8t890/romstrap.inc -ldscripts += $(src)/southbridge/via/k8t890/romstrap.lds -endif -ifeq ($(CONFIG_NORTHBRIDGE_VIA_VX800),y) -crt0s += $(src)/northbridge/via/vx800/romstrap.inc -ldscripts += $(src)/northbridge/via/vx800/romstrap.lds -endif +crt0s += $(chipset_bootblock_inc) +ldscripts += $(chipset_bootblock_lds) endif OPTION_TABLE_H:= diff --git a/src/northbridge/via/vx800/Makefile.inc b/src/northbridge/via/vx800/Makefile.inc index 12b3ef4cafea..30bfb7c59a0b 100644 --- a/src/northbridge/via/vx800/Makefile.inc +++ b/src/northbridge/via/vx800/Makefile.inc @@ -25,3 +25,5 @@ driver-y += vga.o driver-y += vx800_lpc.o driver-y += vx800_ide.o +chipset_bootblock_inc += $(src)/northbridge/via/vx800/romstrap.inc +chipset_bootblock_lds += $(src)/northbridge/via/vx800/romstrap.lds diff --git a/src/southbridge/nvidia/ck804/Makefile.inc b/src/southbridge/nvidia/ck804/Makefile.inc index addc84bec7e9..8960907b1520 100644 --- a/src/southbridge/nvidia/ck804/Makefile.inc +++ b/src/southbridge/nvidia/ck804/Makefile.inc @@ -14,3 +14,6 @@ driver-y += ck804_ht.o obj-y += ck804_reset.o obj-$(CONFIG_GENERATE_ACPI_TABLES) += ck804_fadt.o + +chipset_bootblock_inc += $(src)/southbridge/nvidia/ck804/romstrap.inc +chipset_bootblock_lds += $(src)/southbridge/nvidia/ck804/romstrap.lds diff --git a/src/southbridge/sis/sis966/Makefile.inc b/src/southbridge/sis/sis966/Makefile.inc index 3c4d894d057d..54586c477b53 100644 --- a/src/southbridge/sis/sis966/Makefile.inc +++ b/src/southbridge/sis/sis966/Makefile.inc @@ -9,3 +9,6 @@ driver-y += sis966_sata.o driver-y += sis966_pcie.o driver-y += sis966_aza.o obj-y += sis966_reset.o + +chipset_bootblock_inc += $(src)/southbridge/sis/sis966/romstrap.inc +chipset_bootblock_lds += $(src)/southbridge/sis/sis966/romstrap.lds |