diff options
| author | Kangheui Won <khwon@chromium.org> | 2021-04-21 14:48:14 +1000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-04-23 16:39:03 +0000 |
| commit | 6b36c836266d7864f39e18381e58c8961a3fe491 (patch) | |
| tree | 32dfe5fdab3e1f393c65c2aa3b532b6ca82341a2 /src | |
| parent | 62047e582b0eaed085cf452630c1260f092b8782 (diff) | |
| download | coreboot-6b36c836266d7864f39e18381e58c8961a3fe491.tar.gz coreboot-6b36c836266d7864f39e18381e58c8961a3fe491.tar.bz2 coreboot-6b36c836266d7864f39e18381e58c8961a3fe491.zip | |
soc/amd/picasso: clean up Kconfig and header
Clean up Kconfig and psp_trasfer.h files before copying over to cezanne.
TEST=build, flash and boot on jelboz360
Signed-off-by: Kangheui Won <khwon@chromium.org>
Change-Id: Ib370d93e23c15a2fe4c46051ed3647d2d067bb10
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52563
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/picasso/Kconfig | 14 | ||||
| -rw-r--r-- | src/soc/amd/picasso/include/soc/psp_transfer.h | 4 |
2 files changed, 4 insertions, 14 deletions
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 1918cb734f27..63fa0103ac26 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -109,9 +109,9 @@ config PSP_SHAREDMEM_BASE default 0x0 help This variable defines the base address in DRAM memory where PSP copies - vboot workbuf to. This is used in linker script to have a static + the vboot workbuf. This is used in the linker script to have a static allocation for the buffer as well as for adding relevant entries in - BIOS directory table for the PSP. + the BIOS directory table for the PSP. config PSP_SHAREDMEM_SIZE hex @@ -405,16 +405,6 @@ config PSP_WHITELIST_FILE depends on HAVE_PSP_WHITELIST_FILE default "3rdparty/amd_blobs/picasso/PSP/wtl-rvn.sbin" -config PSP_SHAREDMEM_SIZE - hex "Maximum size of shared memory area" - default 0x3000 if VBOOT - default 0x0 - help - Sets the maximum size for the PSP to pass the vboot workbuf and - any logs or timestamps back to coreboot. This will be copied - into main memory by the PSP and will be available when the x86 is - started. - config PSP_UNLOCK_SECURE_DEBUG bool "Unlock secure debug" default n diff --git a/src/soc/amd/picasso/include/soc/psp_transfer.h b/src/soc/amd/picasso/include/soc/psp_transfer.h index 51c9eacb5729..b5dffe7b39ca 100644 --- a/src/soc/amd/picasso/include/soc/psp_transfer.h +++ b/src/soc/amd/picasso/include/soc/psp_transfer.h @@ -9,7 +9,7 @@ # error "Must set CONFIG_CMOS_RECOVERY_BYTE" # endif -#define CMOS_RECOVERY_MAGIC_VAL 0x96 +#define CMOS_RECOVERY_MAGIC_VAL 0x96 #define TRANSFER_INFO_SIZE 64 #define TIMESTAMP_BUFFER_SIZE 0x200 @@ -44,7 +44,7 @@ struct transfer_info_struct { uint32_t psp_info; /* Offset 0x3C */ }; -_Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE, \ +_Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE, "TRANSFER_INFO_SIZE is incorrect"); /* Make sure the PSP transferred information over to x86 side. */ |