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| author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | 2021-04-12 21:30:19 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-04-23 14:46:33 +0000 |
| commit | a2a90a3157abdc812c42a2d24660167729a40df0 (patch) | |
| tree | 847a6fe573f387e29941264c6e0b597511bc10e7 /src | |
| parent | 457c661f62b7614b6652e1ee1b67ad7596da4b17 (diff) | |
| download | coreboot-a2a90a3157abdc812c42a2d24660167729a40df0.tar.gz coreboot-a2a90a3157abdc812c42a2d24660167729a40df0.tar.bz2 coreboot-a2a90a3157abdc812c42a2d24660167729a40df0.zip | |
soc/intel/alderlake: Add DPTF HIDs for Alder Lake SoC
Add DPTF HIDs for thermal funcitonality for Alder Lake SoC.
BRANCH=None
BUG=None
TEST=Built and tested on adlrvp board
Change-Id: I8de58497fa800690d04abbdfe4d6abf1c0184334
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52268
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/alderlake/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/dptf.c | 18 |
2 files changed, 19 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index 5c1617ba91d2..7252085a1e88 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -30,6 +30,7 @@ romstage-y += reset.c ramstage-y += acpi.c ramstage-y += chip.c ramstage-y += cpu.c +ramstage-y += dptf.c ramstage-y += elog.c ramstage-y += espi.c ramstage-y += finalize.c diff --git a/src/soc/intel/alderlake/dptf.c b/src/soc/intel/alderlake/dptf.c new file mode 100644 index 000000000000..2af96df5bb82 --- /dev/null +++ b/src/soc/intel/alderlake/dptf.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <drivers/intel/dptf/dptf.h> + +static const struct dptf_platform_info adl_dptf_platform_info = { + .use_eisa_hids = false, + /* _HID for the toplevel DPTF device, typically \_SB.DPTF */ + .dptf_device_hid = "INTC1041", + /* _HID for Intel DPTF Generic Device (these require PTYP as well) */ + .generic_hid = "INTC1046", + /* _HID for Intel DPTF Fan Device */ + .fan_hid = "INTC1048", +}; + +const struct dptf_platform_info *get_dptf_platform_info(void) +{ + return &adl_dptf_platform_info; +} |