diff options
author | Elyes Haouas <ehaouas@noos.fr> | 2022-10-11 13:40:51 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-10-12 14:18:01 +0000 |
commit | c929f0933f5f4bbb15573a1bb64c799cd1fc3a02 (patch) | |
tree | 9d60591a5650e3814abb11910522ed60db288cd0 /src | |
parent | baec560c7a6178edb9ba1e4d1d1bd6aee1852d0d (diff) | |
download | coreboot-c929f0933f5f4bbb15573a1bb64c799cd1fc3a02.tar.gz coreboot-c929f0933f5f4bbb15573a1bb64c799cd1fc3a02.tar.bz2 coreboot-c929f0933f5f4bbb15573a1bb64c799cd1fc3a02.zip |
treewide: Use 'gpe0_blk' for 'x_gpe0_blk.addrl'
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I05d5097097b925a7bc8058f4c23e7c13a49f03c5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src')
-rw-r--r-- | src/soc/amd/cezanne/acpi.c | 2 | ||||
-rw-r--r-- | src/soc/amd/mendocino/acpi.c | 2 | ||||
-rw-r--r-- | src/soc/amd/morgana/acpi.c | 2 | ||||
-rw-r--r-- | src/soc/amd/picasso/acpi.c | 2 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/acpi.c | 2 | ||||
-rw-r--r-- | src/soc/intel/baytrail/fadt.c | 2 | ||||
-rw-r--r-- | src/soc/intel/braswell/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/amd/agesa/hudson/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/amd/pi/hudson/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801dx/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801gx/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801ix/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/i82801jx/fadt.c | 2 | ||||
-rw-r--r-- | src/southbridge/intel/ibexpeak/fadt.c | 2 |
16 files changed, 16 insertions, 16 deletions
diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c index 3f7a00ff255f..1c7c69f51782 100644 --- a/src/soc/amd/cezanne/acpi.c +++ b/src/soc/amd/cezanne/acpi.c @@ -127,7 +127,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/soc/amd/mendocino/acpi.c b/src/soc/amd/mendocino/acpi.c index 54e342461139..102629e9ef43 100644 --- a/src/soc/amd/mendocino/acpi.c +++ b/src/soc/amd/mendocino/acpi.c @@ -129,7 +129,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/soc/amd/morgana/acpi.c b/src/soc/amd/morgana/acpi.c index 003c4ead9060..168e1c4eaca4 100644 --- a/src/soc/amd/morgana/acpi.c +++ b/src/soc/amd/morgana/acpi.c @@ -130,7 +130,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index b4ee23b2fd49..d1e1ef5c150e 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -135,7 +135,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; /* EventStatus + Event Enable */ fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index 246581e696b4..a89bd0f2437d 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -127,7 +127,7 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; /* EventStatus + Event Enable */ fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/soc/intel/baytrail/fadt.c b/src/soc/intel/baytrail/fadt.c index 316df6f23596..870d5cc8c03e 100644 --- a/src/soc/intel/baytrail/fadt.c +++ b/src/soc/intel/baytrail/fadt.c @@ -77,6 +77,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/soc/intel/braswell/fadt.c b/src/soc/intel/braswell/fadt.c index 316df6f23596..870d5cc8c03e 100644 --- a/src/soc/intel/braswell/fadt.c +++ b/src/soc/intel/braswell/fadt.c @@ -77,6 +77,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c index acf3e69ca08b..59725327e127 100644 --- a/src/southbridge/amd/agesa/hudson/fadt.c +++ b/src/southbridge/amd/agesa/hudson/fadt.c @@ -89,6 +89,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; /* EventStatus + Event Enable */ fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c index 439abed59f18..cf566faf9509 100644 --- a/src/southbridge/amd/cimx/sb800/fadt.c +++ b/src/southbridge/amd/cimx/sb800/fadt.c @@ -120,6 +120,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; /* EventStatus + Event Enable */ fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = GPE0_BLK_ADDRESS; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c index eb79f9f7aa5c..8eea5baeae30 100644 --- a/src/southbridge/amd/pi/hudson/fadt.c +++ b/src/southbridge/amd/pi/hudson/fadt.c @@ -92,6 +92,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; /* EventStatus + Event Enable */ fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = ACPI_GPE0_BLK; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/southbridge/intel/bd82x6x/fadt.c b/src/southbridge/intel/bd82x6x/fadt.c index 8889ba9752f3..624df0532deb 100644 --- a/src/southbridge/intel/bd82x6x/fadt.c +++ b/src/southbridge/intel/bd82x6x/fadt.c @@ -83,6 +83,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c index b70808f65089..f64aad09a4b1 100644 --- a/src/southbridge/intel/i82801dx/fadt.c +++ b/src/southbridge/intel/i82801dx/fadt.c @@ -75,6 +75,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_UNDEFINED; - fadt->x_gpe0_blk.addrl = pmbase + 0x28; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/southbridge/intel/i82801gx/fadt.c b/src/southbridge/intel/i82801gx/fadt.c index c3fbf68fac41..7d38a28bfaed 100644 --- a/src/southbridge/intel/i82801gx/fadt.c +++ b/src/southbridge/intel/i82801gx/fadt.c @@ -82,6 +82,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/southbridge/intel/i82801ix/fadt.c b/src/southbridge/intel/i82801ix/fadt.c index 2e1c8150ed1b..d1b36dca1fdd 100644 --- a/src/southbridge/intel/i82801ix/fadt.c +++ b/src/southbridge/intel/i82801ix/fadt.c @@ -73,6 +73,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/southbridge/intel/i82801jx/fadt.c b/src/southbridge/intel/i82801jx/fadt.c index 3ee504c6e099..535ac20e0a0f 100644 --- a/src/southbridge/intel/i82801jx/fadt.c +++ b/src/southbridge/intel/i82801jx/fadt.c @@ -73,6 +73,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } diff --git a/src/southbridge/intel/ibexpeak/fadt.c b/src/southbridge/intel/ibexpeak/fadt.c index 21daad92e69c..526d0b7a49a6 100644 --- a/src/southbridge/intel/ibexpeak/fadt.c +++ b/src/southbridge/intel/ibexpeak/fadt.c @@ -82,6 +82,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_gpe0_blk.bit_width = fadt->gpe0_blk_len * 8; fadt->x_gpe0_blk.bit_offset = 0; fadt->x_gpe0_blk.access_size = ACPI_ACCESS_SIZE_BYTE_ACCESS; - fadt->x_gpe0_blk.addrl = pmbase + GPE0_STS; + fadt->x_gpe0_blk.addrl = fadt->gpe0_blk; fadt->x_gpe0_blk.addrh = 0x0; } |