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| author | Felix Singer <felixsinger@posteo.net> | 2023-11-12 17:49:59 +0000 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2023-11-13 20:47:34 +0000 |
| commit | 2516a205f8c96876dafd851dedfbddab87df65bc (patch) | |
| tree | 95cbce69fc17d90cddfb9dc8ddb613096ca5fd70 /src | |
| parent | e2ce52f59f55791ac3e50457e221931a44929180 (diff) | |
| download | coreboot-2516a205f8c96876dafd851dedfbddab87df65bc.tar.gz coreboot-2516a205f8c96876dafd851dedfbddab87df65bc.tar.bz2 coreboot-2516a205f8c96876dafd851dedfbddab87df65bc.zip | |
mb/facebook/monolith: Make use of the chipset devicetree
Use the references from the chipset devicetree as this makes the
comments superfluous and remove devices which are turned off.
Change-Id: Ib1adeaf4745804dfc91f99fb4e4491b68631202c
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79036
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/facebook/monolith/devicetree.cb | 41 |
1 files changed, 19 insertions, 22 deletions
diff --git a/src/mainboard/facebook/monolith/devicetree.cb b/src/mainboard/facebook/monolith/devicetree.cb index 7c4c53332625..3f71ca9e2e3a 100644 --- a/src/mainboard/facebook/monolith/devicetree.cb +++ b/src/mainboard/facebook/monolith/devicetree.cb @@ -216,30 +216,27 @@ chip soc/intel/skylake device cpu_cluster 0 on end device domain 0 on - device pci 00.0 on end # Host Bridge - device pci 02.0 on end # Integrated Graphics Device - device pci 04.0 on end # Thermal Subsystem - device pci 08.0 on end # Gaussian Mixture Model - device pci 14.0 on end # USB xHCI - device pci 14.1 on end # USB xDCI (OTG) - device pci 14.2 on end # Thermal Subsystem - device pci 16.0 on end # Management Engine Interface 1 - device pci 17.0 on end # SATA - device pci 1c.2 on end # PCI Express Port 3 x1 baseboard WWAN - device pci 1c.5 on end # PCI Express Port 6 x1 baseboard i210 - device pci 1d.0 on end # PCI Express Port 9 x4 FPGA - device pci 1e.0 on end # UART #0 - device pci 1e.4 on end # eMMC - device pci 1f.0 on # LPC Interface + device ref igpu on end + device ref sa_thermal on end + device ref gmm on end + device ref south_xhci on end + device ref south_xdci on end + device ref thermal on end + device ref heci1 on end + device ref sata on end + device ref pcie_rp3 on end # x1 baseboard WWAN + device ref pcie_rp6 on end # x1 baseboard i210 + device ref pcie_rp9 on end # x4 FPGA + device ref uart0 on end + device ref emmc on end + device ref lpc_espi on chip drivers/pc80/tpm device pnp 0c31.0 on end end - end # LPC Bridge - device pci 1f.1 on end # P2SB - device pci 1f.2 on end # Power Management Controller - device pci 1f.3 on end # HDA Controller for HDMI only - device pci 1f.4 on end # SMBus - device pci 1f.5 on end # PCH SPI - device pci 1f.6 on end # GbE + end + device ref hda on end # for HDMI only + device ref smbus on end + device ref fast_spi on end + device ref gbe on end end end |