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author | Felix Singer <felixsinger@posteo.net> | 2024-01-13 22:03:24 +0100 |
---|---|---|
committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-01-14 23:31:29 +0000 |
commit | 7563a32981cb4708c1b268cbbb6c0dbe746f666d (patch) | |
tree | 71af5ffe6de098bb7ba72cff3488d809ce12b101 /src | |
parent | c1a0e128a08a119bd5eda868594428cb02837d2a (diff) | |
download | coreboot-7563a32981cb4708c1b268cbbb6c0dbe746f666d.tar.gz coreboot-7563a32981cb4708c1b268cbbb6c0dbe746f666d.tar.bz2 coreboot-7563a32981cb4708c1b268cbbb6c0dbe746f666d.zip |
mb/lenovo/t530: Convert remaining PCI numbers into reference names
Change-Id: Ied9f37355432d58f83cb8453111a261c4eddc14a
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79937
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/lenovo/t530/variants/t530/overridetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/lenovo/t530/variants/w530/overridetree.cb | 10 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/lenovo/t530/variants/t530/overridetree.cb b/src/mainboard/lenovo/t530/variants/t530/overridetree.cb index 98551ac96888..fda8aef34e17 100644 --- a/src/mainboard/lenovo/t530/variants/t530/overridetree.cb +++ b/src/mainboard/lenovo/t530/variants/t530/overridetree.cb @@ -2,7 +2,7 @@ chip northbridge/intel/sandybridge register "spd_addresses" = "{0x50, 0, 0x51, 0}" device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH - device pci 1f.0 on # PCI-LPC bridge + device ref lpc on # PCI-LPC bridge chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "has_wwan_detection" = "1" diff --git a/src/mainboard/lenovo/t530/variants/w530/overridetree.cb b/src/mainboard/lenovo/t530/variants/w530/overridetree.cb index 77b75fd23772..2029dc3aee2d 100644 --- a/src/mainboard/lenovo/t530/variants/w530/overridetree.cb +++ b/src/mainboard/lenovo/t530/variants/w530/overridetree.cb @@ -1,26 +1,26 @@ chip northbridge/intel/sandybridge register "spd_addresses" = "{0x50, 0x52, 0x51, 0x53}" device domain 0 on - device pci 02.0 on # Internal graphics VGA controller + device ref igd on # Internal graphics VGA controller subsystemid 0x17aa 0x21f5 end chip southbridge/intel/bd82x6x # Intel Series 7 Panther Point PCH - device pci 16.3 on end # Management Engine KT - device pci 1c.0 on # PCIe Port #1 + device ref me_kt on end # Management Engine KT + device ref pcie_rp1 on # PCIe Port #1 chip drivers/ricoh/rce822 # Ricoh cardreader register "disable_mask" = "0x83" register "sdwppol" = "1" device pci 00.0 on end # Ricoh SD card reader end end - device pci 1f.0 on # PCI-LPC bridge + device ref lpc on # PCI-LPC bridge chip ec/lenovo/h8 device pnp ff.2 on end # dummy register "config1" = "0x01" register "config3" = "0xe2" end end - device pci 1f.6 off end # Thermal + device ref thermal off end # Thermal end end end |