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author | Jonathan Zhang <jonzhang@fb.com> | 2021-03-22 16:12:05 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-24 07:53:52 +0000 |
commit | 8b22c558554c3722cbd809fac132a5ca46451280 (patch) | |
tree | f3833912ae93b8ac85f0b7499532154c739c7fe9 /util/abuild | |
parent | 570ae23516593e243e29750f4b61a1b841a5ad27 (diff) | |
download | coreboot-8b22c558554c3722cbd809fac132a5ca46451280.tar.gz coreboot-8b22c558554c3722cbd809fac132a5ca46451280.tar.bz2 coreboot-8b22c558554c3722cbd809fac132a5ca46451280.zip |
soc/intel/fsp_broadwell_de: Add definition for LGMR
Add definition for LPC Generic Memory Range register.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I7c76bacdf692e72849547106f29b614345f505c1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51716
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'util/abuild')
0 files changed, 0 insertions, 0 deletions