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| author | Joseph Smith <joe@settoplinux.org> | 2010-06-16 22:21:19 +0000 |
|---|---|---|
| committer | Joseph Smith <joe@smittys.pointclark.net> | 2010-06-16 22:21:19 +0000 |
| commit | e10757ed525cdd1a5263b9d79e284310c999c0f7 (patch) | |
| tree | ddbf7fe12d122e2f640868109831a7aec72bb067 /util/inteltool/gpio.c | |
| parent | cfaa081f98ef44aa45b98d450367d8742135eae6 (diff) | |
| download | coreboot-e10757ed525cdd1a5263b9d79e284310c999c0f7.tar.gz coreboot-e10757ed525cdd1a5263b9d79e284310c999c0f7.tar.bz2 coreboot-e10757ed525cdd1a5263b9d79e284310c999c0f7.zip | |
This patch adds inteltool support for i810E and ICH2.
Signed-off-by: Joseph Smith <joe@settoplinux.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5632 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'util/inteltool/gpio.c')
| -rw-r--r-- | util/inteltool/gpio.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c index 4d0ced81bae3..a3b6e3d4a0f2 100644 --- a/util/inteltool/gpio.c +++ b/util/inteltool/gpio.c @@ -39,6 +39,25 @@ static const io_register_t ich0_gpio_registers[] = { { 0x3C, 4, "RESERVED" } }; +static const io_register_t ich2_gpio_registers[] = { + { 0x00, 4, "GPIO_USE_SEL" }, + { 0x04, 4, "GP_IO_SEL" }, + { 0x08, 4, "RESERVED" }, + { 0x0c, 4, "GP_LVL" }, + { 0x10, 4, "RESERVED" }, + { 0x14, 4, "GPO_TTL" }, + { 0x18, 4, "GPO_BLINK" }, + { 0x1c, 4, "RESERVED" }, + { 0x20, 4, "RESERVED" }, + { 0x24, 4, "RESERVED" }, + { 0x28, 4, "RESERVED" }, + { 0x2c, 4, "GPI_INV" }, + { 0x30, 4, "RESERVED" }, + { 0x34, 4, "RESERVED" }, + { 0x38, 4, "RESERVED" }, + { 0x3C, 4, "RESERVED" } +}; + static const io_register_t ich4_gpio_registers[] = { { 0x00, 4, "GPIO_USE_SEL" }, { 0x04, 4, "GP_IO_SEL" }, @@ -176,6 +195,11 @@ int print_gpios(struct pci_dev *sb) gpio_registers = ich4_gpio_registers; size = ARRAY_SIZE(ich4_gpio_registers); break; + case PCI_DEVICE_ID_INTEL_ICH2: + gpiobase = pci_read_word(sb, 0x58) & 0xfffc; + gpio_registers = ich2_gpio_registers; + size = ARRAY_SIZE(ich2_gpio_registers); + break; case PCI_DEVICE_ID_INTEL_ICH: case PCI_DEVICE_ID_INTEL_ICH0: gpiobase = pci_read_word(sb, 0x58) & 0xfffc; |